I have heard that semi. vendors prefer a spec with no less than about a
Typically it is much tighter, and you will see much less variation than
this ... but the process is a moving target. Over the lifetime of a
product, as they tune their process to optimize both speed and yield
over their whole product line, you might see a rather wide variation in
some process parameters.
If you include a die shrink, or even just an alternate fab line, the
vendor might not want to commit to anything less than 3:1 or so. He
needs to cover his ass, and the fact that IC fabrication still has
Now if these are mixed/analog ICs and they tune the process specifically
for transistor strength rather than speed, the situation might differ.
I have heard of devices that went out of production because they "lost
the recipe" and couldn't tweak the fab line to get back within spec on