Re: [SI-LIST] : Surface Mount Cap Lead Inductance

Vigliarolo Roberto (Vigliarolo@asamrt.interbusiness.it)
Wed, 12 Aug 1998 10:47:41 +0200

Sorry fom my message being late but I live in Europe and as you
now there is
at least 6h time difference between here and the USA....
I agree with you all but it seems to me that the original
question from Mike Mayer=20
was related to SMD tantalum caps (7343, 6032, etc.) and my
understanding is that
their ESL is higher than the ESL of ceramic cap (1 to 3 nH: see
for an example=20
page 25 of Kemet catalog F-3102B 2/97) and so it is of the same
order of the=20
layout inductance.
Of course you have to consider that the resonance you obtain is
damped by the=20
relatively high ESR of tantalum caps and so it is difficult to
have probelms with=20
resonances associated with tantalum caps.

> ----------
> Da: Larry Smith[SMTP:ldsmith@lisboa.Eng.Sun.COM]
> Risposta a: Larry Smith
> Inviato: marted=EC 11 agosto 1998 19.07
> A: Vigliarolo@asamrt.interbusiness.it; raymonda@radium.Eng.Sun.COM
> Cc: si-list@silab.Eng.Sun.COM
> Oggetto: Re: [SI-LIST] : Surface Mount Cap Lead Inductance
>=20
> Tanmoy Roy, John Prymack and myself will be presenting a paper
> in October at the EPEP conference that goes into a little more
> depth on the mounted inductance of decoupling capacitors. We
> find that there are 3 major contributers capacitor inductance:
>=20
> pad and via design 1.00 to 4.00 nH
> plane spreading inductance 0.01 to 0.50 nH
> capacitor height 0.20 to 0.40 nH
> =09
> The three components sum together. Inductance is essentially a
> measurement of the flux or B field in the environment caused by
> current going around a loop. The bigger the loop, the more the
> flux and the more the inducance. =20
>=20
> As Ray stated below, the pad and via design are the most important
> contributers to capacitor inductance. The design of the power planes
> (PCB stackup) is second in importance. Third in importance is the
> capacitor height. If the capacitor manufacturer has compensated out
> the first two contributors to inductance (given you the self
> inductance of the capacitor) the third (and least important) part is
> all you get. Inductance numbers quoted for surface mount devices
> are often mis-interpreted or mis-understood.
>=20
> Come to the EPEP in West Point NY on October 26-28 and get the
> rest of the story!
>=20
> regards,
> Larry Smith
> Sun Microsystems
>=20
>=20
> > Date: Tue, 11 Aug 1998 09:17:13 -0700 (PDT)
> > From: Ray Anderson <raymonda@radium.eng.sun.com>
> > Subject: Re: [SI-LIST] : Surface Mount Cap Lead Inductance
> > To: Vigliarolo@asamrt.interbusiness.it
> > Cc: si-list@silab.eng.sun.com
> > Mime-Version: 1.0
> >=20
> >=20
> > You will probably find that the ESL of the capacitor
> > is only a small part of the "mounted inductance" of the part
> > when it is placed on a PCB. A larger percentage of the total
> > loop inductance that your circuit sees associated with a mounted
> > capacitor comes from the following factors:
> >=20
> > 1 Pad Geometry
> > connector traces
> > via location
> > Number of vias
> > =09
> > 2 Stackup
> > distance from mounting pads to power planes
> > =09
> > All those factors that influence the loop area seen by the
> current
> > flowing through the capacitor influence the mounted inductance. The
> amount=20
> > contributed by the capacitor is a small part and is usually
> overwhelmed by=20
> > the other constituents unless you do a VERY good job in minimizing
> the other=20
> > contributions (which can be done). The ESL of the capacitor by
> itself is a=20
> > very strong function of the height dimension of the part.
> >=20
> > It is the mounted inductance of a bypass capacitor that mostly=20
> determines
> > the effectivness of the bypassing that the part provides.
> >=20
> >=20
> > Ray Anderson
> >=20
> > Sun Microsystems Inc. =09
> >=20
> >=20
> >=20
> > > From: Vigliarolo Roberto <Vigliarolo@asamrt.interbusiness.it>
> > > To: si-list@silab.eng.sun.com
> > > Subject: Re: [SI-LIST] : Surface Mount Cap Lead Inductance
> > > Date: Tue, 11 Aug 1998 17:55:15 +0200
> > > X-Priority: 3
> > > MIME-Version: 1.0
> > > Content-Transfer-Encoding: quoted-printable
> > >=20
> > > You can easily calculate the ESL of your capacitor by looking at
> the
> > > frequency of the dip in the impedance vs frequency chart usually
> > > provided by capacitors manufacturer.
> Fresonance=3D1/(2*pi*sqrt(ESL*C))
> > >=20
> > >=20
> > >=20
> > > > ----------
> > > > Da: Mike Mayer[SMTP:Mike.Mayer@heurikon.com]
> > > > Inviato: luned=EC 20 luglio 1998 22.40
> > > > A: si-list@silab.Eng.Sun.COM
> > > > Oggetto: [SI-LIST] : Surface Mount Cap Lead Inductance
> > > >=20
> > > > I was looking at a note from howard Johnson about decoupling
> ("Bypass
> > > > Multi-Valued Arrays"):
> > > >=20
> > > > http://www.sigcon.com/news/1_17.htm
> > > >=20
> > > > I started looking into it but can't seem to find any =
information
> on
> > > > lead inductance for surface mount packages, especially the =
types
> used
> > > > by tantalum caps (7343, 6032, etc.). Has anyone seen a source
> for this
> > > > information?
> > > >=20
> > > > --=20
> > > >
> =
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> > > > =3D=3D=3D=3D=3D=3D=3D
> > > > Mike Mayer Artesyn Communication
> > > > Products, Inc
> > > > Madison, WI
> > > >
> http://www.artesyn.com/cp
> > > >
> =
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> > > > =3D=3D=3D=3D=3D=3D=3D
> > > >=20
>=20