Which gives us a very low transmission speed in the transmission-line formed
by the ground and power plane. That should give about 18ns/m.
I do not expect the capacitive plane to give all the charge I need
so I need decoupling capacitors still. To maintain a risetime of 1ns
the decoupling capacitors need to be placed closer to the drivers than
~1/18 m (5 cm). Normally we use risetimes of 0.4ns which would give
approximatly 2.5cm. If charge from decoupling capacitors outside of that
region is needed the signal risetime will slowdown.
Without detailed analysis I would not know if the new capacitive plane
is better or not, I get more low-inductance capacitance but I also get
a reduction in transmission speed in the capacitive plane.
It probably could be analysed by QUAD AC-Grade. Maybe someone at
QUAD could have a look at it.
Regards /Anders Ekholm
> From owner-si-list@silab.Eng.Sun.COM Wed Oct 29 14:16 MET 1997
> From: firstname.lastname@example.org
> Date: Wed, 29 Oct 97 07:43:46 EST
> Cc: si-list@silab.Eng.Sun.COM
> Subject: Re: [SI-LIST] : Decoupling capacitor selection & placemen
> How does everyone feel about power/ground distributed capacitance?
> Zycon originally developed ZBC2000 - a thin FR4 (.002") power/ground
> core with a capacitance of ~500pf/sq in (usually 2 cores are used) -
> as a decoupling capacitor replacement or adjunct.
> HADCO and Polyclad have developed EmCap - a 0.004" Ceramic / FR4 epoxy
> power/ground core with 2750pf/sq in - as the next generation.
> I have been doing work to predict the ability of both these products
> to replace discrete capacitors in our customers boards and would like
> to hear some honest thoughts and feedback.
> FYI - I'm an EE working at HADCO. I work with the electrical issues in
> PWB - impedance, capacitance, layout, etc. - more or less in house SI.
> Todd DeRego