Re: [SI-LIST] : Worst case VI curve for PCI spec a reality?

Yehuda D. Yizraeli ([email protected])
Mon, 20 Apr 1998 17:43:19 +0200 (EET DST)


You are right, but wrong. The PCI electrical spec, will ensure the
device will work at the PCI bus with ALL allowed configurations, namely
regardless of the number of loads on the bus and ....

The spec, with its input capacitance (maximum) and slot size assure
'proper' reflections which will be properly sampled by all other PCI input
buffer. To make long short, its not for IOL/IOH issues but for strength issues.

best regards, yehuda

> The worst case high state vi curve in the PCI spec shows Voh=2.4v for
> I=0 to 2mA (Figure 4-3, VI curve for 5V signaling). Section 4.1.2 of
> the PCI spec says that "PCI is a CMOS bus", which would mean that Voh
> should be close to the rail (note that Ioh &IiL ~ 70uA per the PCI
> spec.) Granted, 3.3v devices are allowed to drive in a 5V environment,
> and specs for 3.3v parts do say that Voh_min=2.4v but isn't this a
> holdover from the TTL / Bipolar days?
> The difficulty arises in meeting the PCI spec of Tpd_max = 10nsec (due
> to ringback).
> Does anyone know of PCI devices that actually put out 2.4v at I=0 amps
> (high temperature, low supply voltage) or is the spec just too worst
> case?Note that I also question Vol=0.55v at I=0amps for the low state vi
> curve as well.
> Thanks,
> Bob McCormick
> Stratus Computer
> Marlboro, MA
> TEL: 508-460-2485
> [email protected]

God put me on earth to accomplish a certain number of things
        Right now I am so far behind I will never die
   Yehuda D. Yizraeli

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