Re: [SI-LIST] : Package prices and circuit elements values

Brett Grossman (bgrossma@td2cad.intel.com)
Thu, 09 Oct 1997 08:03:01 -0700

Hi,

I may be misunderstanding your needs with this question, but to
accurately determine what decoupling values are necessary, one would
typically need to know the device and supply characteristics, as well as
what % of the supply is allowable as noise.

In the systems that I would typically work with, we extract (or model)
any elements that we can, such as device char. (di/dt) and system supply
response time (i.e. how long does it take the supply to recover from a
massive draw by the system), the PCB constants (plane size and
seperation, dielectric materials, metallization), etc. Then cap
quantity/value is solved based on the amount of time the caps are
expected to supply charge to the system, broken up over several standard
value caps (high freq ceramics, large low freq tantalums, etc.).

Capacitor ESL/ESR are reported in the data sheets for the caps of
choice, board plane parasitics and the decoupling available from the
planes can be approximated with a closed form equation, or a field
solver depending on the geometry and materials used and the accuracy
needed. Module characteristics (such as bond wire resistance, path
inductance) are again dependent on materials, geometry, etc. (one item
that may be overlooked, is that all these parasitic components also
appear on the return path). The physical proximity of all the components
can also be a factor depending on the frequencies of the transients you
are trying to eliminate.

Sorry if I am rambling, and coming no where near answering your
question, but essentially define all the constants in the system that
you can, and make solution sets for the remaining items. This can be
done by some trial-and-error, or linear algebra methods.

- Brett

ii) In the circuit bellow representing a typical (and very simplified)
power supply distribution system, what whould be the typical (or
reasonable) values for the components?

System Concectors Board Board Module
traces to boards traces planes

RS LS RC LC RB LB RPP LPP RM LM
----/\/\/-^^^-+-/\/\/-^^^-+-/\/\/-^^^-+-/\/\/-^^^-+-/\/\/-^^^---+
| | | | | |
| ) ) ) ) |
| ) L1 ) L2 ) L3 ) L4 +-----+
| Power | | | | |chip |
(V) Supply > R1 > R2 > R3 > R4 | |
| < < < < +-----+
| | | | | |
| === C1 === C2 === C3 === C4 |
| | | | | |
_ - - - - -
Low freq Mid freq High freq Module
dec. dec. dec. dec.
cap cap cap cap

-- 
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Brett Grossman        		            __          ___  
Intel Tooling Operations	 __        /\ \__      /\_ \  
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The views expressed are my own.                     \/____/
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