For designing a differential SCSI backplane, I am planning to use a 4
layer,G-S2-S3-P, Dual stripline, stackup. Traces on the two inner
layers are piled up, parallel to each up, beneath and above, not X and
Because the signals are differential, I assume the coupling between
this two parallel lines are cancelled.
However, this backplane will have a chance to use single-end SCSI
chip. In this case, one of the two traces will be grounded by the
chip. I will use a TDR to measure the differential impedance and
Will I need to let one trace be grounded when measuring single-end
impedance with TDR to simulate trace being grounded by chip? How will
the grounded trace influence the single-end impedance? Especially, it
is a trace not a plane.
Any suggestions for this backplane design, based on a requirement of
routing a pair of differential signals on two different planes because
of limitation of estate?
CAE Engineer of EDA Department
Digital Equipment Corp. Taiwan Branch
TEL: 1-886-3-3900000 ext. 2152