Andrew, John, list,
It has long been my belief that the input clamp diodes on CMOS are for
the purpose of providing ESD protection, and for clamping the "occasional=
over/undershoot. They are not provided for the purpose of providing line
termination. My belief is based on verbal communiqu=E9 with cohorts and
apps. engineers (which is to say, it could be based on legend and=20
As a crude example, suppose a full 5V transition is launched onto an
electrically long 50 Ohm line, causing the propagation of a 100 mA=20
current wave. With no other termination or loads, and assuming a clamp=20
forward bias of about 1V, this would require the clamp diode to conduct=20
a peak current of about 80 mA. If this were a highly repetitive signal,=20
the duty cycle for each diode could approach 50%. I would expect serious=20
MTBF issues with this scenario. I would also expect the semiconductor
types on this list to shudder at the thought of such an abusive applicati=
(aside from the strong possibility that the circuit may not function corr=
I would like to pose some related questions for anyone on the list - most
particularly the semiconductor types:
1. Do the semiconductor companies ascribe and/or acquiesce to the use of =
input clamp diodes for line termination?
2. What are typical limits for "one time" peak currents?
3. What are typical limits for repetitive peak currents?
4. What if I were to change the example above such that the driver launch=
3.5 volt wave (70 mA)? The clamp current would then peak at roughly 20=
5. And finally, what if the line length were shorter, so that the clamp
duty cycle were only a few percent?
> Those CMOS devices without input diodes tend to be SI nightmares.
> In a multi-drop bus configuration, diode terminators may be needed at
> several places, perhaps as many as one per input. For a daisy-chain
> route, they may only be needed at the two ends. The best way to tell
> what works is to try, preferably in simulation with GOOD models.
> Andy Ingraham
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