Re: [SI-LIST] : Buried Capacitors

Ravinder Ajmani (
Wed, 30 Jul 1997 11:40:55 -0400

I have been doing some experiments with the buried capacitance. The board used
in our designs is approximately 6"X4", and there is a 3 mil separation between
Power and Ground planes. In my limited experiments, I have observed that on
average, radiated emissions from the board are reduced by about 5 dB in the
frequency range of 200 MHz to 1000 MHz for a board with the buried
capacitance. I have not studied the increase of emissions at some frequencies
due to board resonance. In both cases, the existing bypass capacitors were
left untouched. Reducing this Power/Ground separation to 2 mils didn't show
any significant improvement in performance
At the 1966 IEEE International Symposium on EMC (Santa Clara), there was a
paper on the effect of buried capacitance by S. Caniggia, V. Costa, and L.
Vitucci, of Italy, which you may like to refer.
Regards, Ravinder

07/30/97 01:30 AM
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Subject: [SI-LIST] : Buried Capacitors

I am trying to gain a better understanding on the concept of the buried
capacitors, made of two (2) internal planes on a printed circuit board.

We do not have a general agreement within the design community on the use
of this technique, so I just wanted to bounce it off of this reflector.

Multi-layer PCB's have power and ground planes as a norm. This technique
stacks some of these planes very close together (2 mil thin dielectrics)
to act as a giant capacitor.

The design uses thru-hole vias only.

Are we:
1) reducing noise
2) using this as an alternative to filter-caps
3) using this in conjunction with filter-caps.
4) At what frequencies is this practice appropriate.
5) anything else you can add.


Bob Harrison