The answer to your question is ... yes.
A risetime requires a definition of the method of measurement
and the load under which the measurement is taken. As the load
changes, so does the risetime of a driver. In the IBIS world, we
specify the risetime (and falltime) into a resistive load. That load
is nominally 50 ohms, however it can be any load one desires.
(Although, for simulators it is best to define the risetime into a
load which closely approximates the actual transmission line load
seen by the driving device. The risetime is then measured between
20% and 80% of final value of the driver voltage into the load resistance.
Given a specific measure of the rise and fall time of a device, then we can
predict the transmission line behavior of a wave front launched by the driver,
if the load characteristics of the transmission line environment are close
to those of the risetime specification. That is, we are still operating linearly.
In practice, if you are designing I/O buffers for optimal performance on
a board, it is best to specifiy the rise and fall time into the expected characteristic
impedance of the board traces. This may mean multiple rise and fall time meaurements
when there are multiple load conditions (such as end of line drivers vs. middle of line
drivers.) In these cases, IBIS waveform tables can be generated for multiple
output impedances which are expected in a design.
Regards,
Scott
Weber Chuang wrote:
> > Hi SI-gurus,
> >
> > Risetime and falltime are often mentioned in SI world, and
> > sometimes used to classify lots of problems. My question is when we
> > talk about a risetime of 1 ns, are we talking about loaded risetime?
> > or unloaded risetime? If loaded, then what's the default load used,
> > for example, a driver(I/O cell) might have a measured risetime of more
> > than 1 ns with it's load, yet from simulation we can run it without
> > any load, then the risetime might become less than 1 ns, so how should
> > we define the risetime of this pad.
> >
> > Best Regards
> >
> > Weber Chuang(ChingFu Chuang)
> > SI Engineer, System Team.
> > VIA Technologies, Inc.
> > Taipei, Taiwan, ROC
> > http://www.via.com.tw
> > Very Innovative Architecture
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