Differential clock

fabrizio zanella (fabrizio=zanella%Eng%EMCHOP1@fishbowl02.lss.emc.com)
Wed, 9 Apr 97 9:25:52 EDT

Hello SI engineers,
I understand the benefits of using differential pairs for signals running
at 100MHz and above. Can anyone speak about the impact of using
differential clocks in a parallel bus, though? Do the differential clocks
maintain the noise suppression characteristics when daisy chained in a
multidrop environment?
Has anyone tried this and had positive experiences vs. single ended
multidrop clocks?

Thanks in advance,

Fabrizio Zanella
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