[SI-LIST] : Looking for corner PCI spice models

McCormick, Robert ([email protected])
Mon, 13 Apr 1998 15:10:03 -0400

Messages sorted by: [ date ][ thread ][ subject ][ author ]
Next message: Mike Jenkins: "[SI-LIST] : Re: measuring CMOS Cin with HP4275A"
Previous message: Diaco Davari: "[SI-LIST] : 66 MHz AGP Clock Signal"
Next in thread: [email protected]: "Re: [SI-LIST] : 66 MHz AGP Clock Signal"

I'm looking for best case (fast-fast) and worst case (slow-slow) spice
models which correspond to the best and worst case V/I curves in the PCI
local bus specification (rev 2.1). I tried using the PCI spice models
which come with HSPICE but the VI curves are not worst case.
Specifically, the high state vi curve voltages are higher in voltage for
a given current. For example, at I=0 amps, V=Vcc=5V-Vtolerance (rather
than 2.4v per the pci spec). Since the HSPICE model is a 5V CMOS
device, I kind of expected this anyway (i.e., Voh ~ Vcc).
The case I'm worried about is when a 3.3v device is driving a 5V PCI
bus. Does anyone out there know of any available 3.3v PCI SPICE models
which come somewhat close to the worst case 5V vi curves in the PCI spec
?

Thanks,
Bob McCormick
Stratus Computer
Marlboro, MA 01752
Tel: 508-460-2485

Next message: Mike Jenkins: "[SI-LIST] : Re: measuring CMOS Cin with HP4275A"
Previous message: Diaco Davari: "[SI-LIST] : 66 MHz AGP Clock Signal"
Next in thread: [email protected]: "Re: [SI-LIST] : 66 MHz AGP Clock Signal"