Re: [SI-LIST] : How to identify SSO

Weber Chuang (WeberChuang@via.com.tw)
Thu, 8 Jan 1998 12:34:04 +0800

According to what I have observed and simulated(empirically), and owing
to the mobility nature of electron and hole(theoretically), usually
ground bounce on silent signal is more serious than power drop in CMOS
based designs. I mean "usually".

Best regards

Weber Chuang( ChingFu Chuang)
SI Engineer, System Team.
VIA Technologies, Inc. Taiwan. ROC

> -----=AD=EC=A9l=B6l=A5=F3-----
> =B1H=A5=F3=AA=CC: Jon Powell [SMTP:jonp@pacbell.net]
> =B6=C7=B0e=AE=C9=B6=A1: 1998=A6~1=A4=EB8=A4=E9 =A4W=A4=C8 08:39
> =A6=AC=A5=F3=AA=CC: Andrew Ingraham
> =B0=C6=A5=BB: jfpeterson@space.honeywell.com; =
si-list@silab.Eng.Sun.COM
> =A5D=A6=AE: Re: [SI-LIST] : How to identify SSO
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> My (probably redundant) take on SSO.
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> One thing that has always concerned me with SSO is the affect of the
> VCC
> drop on non-switching signals. Theses signal would have noise on them
> that would mimic the VCC noise on chip (since their outputs are
> effectively shorted to VCC).
>=20
> regards,
> jon powell
>=20
>=20