CAUTION!!!
I just tried UltraCAD's program (out of curiosity) to see what results it would
give me, becuase knew it already that covered traces have lower impedances.
I was shocked to find out that according to UltraCAD the embedded microstrip
line came out with a higher impedance than the uncovered one, in which the
conductor is surrounded by air.
Knowing that this is incorrect, I started to play with the numbers (solving for
impedance) and found out that the two configurations will give identical resuts
if the hight of the dielectric above the conductor is very large (or infinite)
for the embedded case. From this, I concluded that the equations for the
microstrip line with air above the conductor must be incorrect, and most likely
are the equations which HSPICE calls "sea of dielectric" (DLEV=0). However, due
to lack of time I didn't compare the numerical results of UltraCAD and HSPICE to
verify this conclusion.
Instead, I called UltraCAD to find out what is wrong, but all I could do is
leave a message to which I didn't get a response yet.
Arpad Muranyi
Intel Corporation
================================================================================
UltraCAD also has a useful freeware calculator. Find it at
www.ultracad.com
and follow the links to the calculators.
The formulas and their sources are included in the help
file.
I suspect that the problem is four-fold:
1. As has been pointed out, there is a slight embedded microstrip
effect here (see the calculator for this effect.)
2. Er is a function of frequency, so at the frequency of interest,
Er might be mischaracterized
3. Er might also be mischaracterized simply because it often is not
exactly what you expect it to be or what it is spec'd at
4. Manufacturing processes cause a variation that is hard to control.
We have found variations as much as 3 or 4 ohms ALONG A GIVEN TRACE
and especially between boards in the same production run. I have found
that the practical accuracy for impedance vs spec is about 10%.
See the results reported in the article "The Effects of Vias on PCB
Traces" PCB Design Magazine, 8/96 for some real world, controlled examples
of how much variation there can be.
At 02:35 PM 12/9/97 -0000, you wrote:
>Polar Instruments, UK, have a useful little calculator program (public
>domain) that allows you to check this effect. Their web site is
> http://www.polar.co.uk/
>I've put John's figures into this, and it shows about a 5 ohm drop due
>to the mask.
>The calculator also confirms Kenneth Willis' comments about overplating
>being responsible for some of the impedance drop.
>
>Perhaps someone from Polar would like to comment, especially about the
>source for their equations?
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Subject: RE: [SI-LIST] : Does solder mask reduce trace impedance ?
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