Re: SI- Termination Comments Wa

mellitz@eagle.ColumbiaSC.NCR.COM
Mon, 22 Apr 1996 21:24:54 -0400

Normal,

I agree with all that Arpad said... Yes the bread and butter of SI. :-) You
really need a board level simulator to find the best solution. There are a lot
of variables. How many do you control? Somethings that were not mentioned are
drive strength and strategicly placed series terminators (R or L). Also you
need to know how forgiving you receivers are. Then once you think you have
a solution, margin it all with voltage, temperature, silicon, and PWB material
variations. Yup, looks like a full time job to me.

On Apr 22, 4:28pm, Arpad Muranyi wrote:
> Subject: Re: SI- Termination Comments Wa
>
> Text item:
>
> Norman,
>
> Your questions are addressing issues that is the bread and butter of every
> signal integrity engineer. There are lot of books out there which address these
> issues, including my good old favorite, the Motorola ECL Design Handbook.
>
> Everything you say in your EMAIL makes sense.
>
> The impedance will vary with distance to GND plane, but ~50~75 Ohms are in the
> range of numbers I have seen.
>
> If possible avoid changing layers.
>
> Chain topology is better than having stubs.
>
> Parallel terminations do draw DC current which normal buffers are not designed
> to do, so your Vol and Voh might be "loaded" depending on which supply you are
> using for your termination.
>
> 5 ns rise/fall times are more forgiving than 1 ns, but to decide what you can do
> you need to know the length of the trace also. This goes for the length of the
> stubs as well. With slower rise/fall times you can generally have longer stubs.
> The best, however, is not having stubs at all...
>
> There are no short, clear answers to these questions. Most often you need to
> run a lot of simulations and learn from the simulation results... Most of the
> questions you are asking can be answered by parameterized Monte Carlo type
> simulations and plotting the results in a statistical manner. This is how most
> of us figure out the best solutions and the design space for a given design,
> topology, loading condition, etc...
>
> Good luck,
>
> Arpad Muranyi
> Intel Corporation
> ================================================================================
> Subject: Time:3:44 =
> PM
> OFFICE MEMO SI- Termination Comments Wanted =
> Date:4/19/96
>
> I am currently working on a mid-speed (<50MHz) digital circuit pack and =
> would like to proper terminate some long lines(up to 15 inches). It =
> consists of CPU, DSP, SRAM, Flash etc. I am approaching the problem by =
> using Daisy-Chained tracks and AC terminations. There are some findings =
> that I would like your comments:
>
> 1. When using uncontrolled-impedance FR4 PCB, based on my calculation on =
> a 6 layer board, the micro-strip (8 mil) Z0 is about 75 Ohm and the =
> micro-strip Z0 is about 45 Ohm. That means a mismatch every time I =
> switch layers. Does anyone has experience on this? Does it matter for 5 =
> ns rise time? How about 1ns rise time?
>
> 2. My EDA simulation package showed that after termination, my signals =
> do not look much cleaner. In fact, it look worse and seems to be loaded =
> down (Vpeak is about 3.5-4V instead of 5V). Does this make sense?
>
> 3. At want point could I use T instead of Daisy-Chain so that the stub =
> look like capacitance, no transmission lines? A lot of time daisy chain =
> line is longer than a treed line.
>
> All comments on this matter are welcome.
>
> Thank you.
>
> Norman Wong
> Hardware Design Engineer
> Nortel, Wireless Development Center, Calgary
>
> Text item: External Message Header
>
> The following mail header is for administrative use
> and may be ignored unless there are problems.
>
> ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
>
> Content-Transfer-Encoding: quoted-printable
> Content-Type: text/plain; charset="US-ASCII"; Name="Message Body"
> Mime-Version: 1.0
> X-Mailer: Mail*Link SMTP-QM 3.0.2
> To: Signal Intergity Group <si-list@silab.Eng.Sun.COM>
> Subject: SI- Termination Comments Wa
> From: Norman Wong <Norman.Wong.0139127@nt.com>
> Date: 19 Apr 1996 16:55:25 -0400
> Message-Id: <n1382182104.30419@nmisq2.miss.nt.com>
> Received: from nmiss1.miss.nt.com by nrchh57.rich1.nt.com
> with SMTP (1.38.193.5/16.2) id AA20117;
> Fri, 19 Apr 1996 18:59:29 -0400
> Received: from nrchh57.rich1.nt.com by corpgate.rich.nt.com with SMTP (PP);
> Fri, 19 Apr 1996 23:00:58 +0000
> Received: by mercury.Sun.COM (Sun.COM)
> id QAA24703; Fri, 19 Apr 1996 16:01:49 -0700
> Received: from mercury.Sun.COM (mercury.EBay.Sun.COM) by Eng.Sun.COM (5.x/SMI-5.
> 3)
> id AA28887; Fri, 19 Apr 1996 16:01:55 -0700
> Errors-To: si-admin@silab.Eng.Sun.COM
> Received: from Eng.Sun.COM (engmail1) by silab.Eng.Sun.COM (4.1/SMI-4.1)
> id AA06204; Fri, 19 Apr 96 16:02:28 PDT
> Errors-To: si-admin@silab.Eng.Sun.COM
> Received: from silab.Eng.Sun.COM (silab-188.Eng.Sun.COM) by Eng.Sun.COM (5.x/SMI
> -5.3)
> id AA22066; Fri, 19 Apr 1996 16:03:36 -0700
> Received: by mercury.Sun.COM (Sun.COM)
> id QAA25331; Fri, 19 Apr 1996 16:03:46 -0700
> Received: from mercury.Sun.COM by marceau.fm.intel.com (8.7.4/10.0i); Sat, 20 Ap
> r 1996 11:17:22 GMT
> Received: from marceau.fm.intel.com by fmmail.fm.intel.com with smtp
> (Smail3.1.28.1 #2) id m0uAadY-000rHrC; Sat, 20 Apr 96 04:15 PDT
>-- End of excerpt from Arpad Muranyi