Separate +5V Plane

Farrokh Mottahedin (fmottahe@qntm.com)
Thu, 27 Mar 1997 14:59:01 -0800

I have a question for anyone who cares to answer:

It is a common practice to separate the GROUND planes between digital
and analog portions of a design. I have heard pro and con arguments
on this practice. I am interested in your opinion on this and also on
the following questions:

What about separating the Vcc plane between an area of a design with a
noisy ASIC and another area where noise on Vcc can not be tolerated?
Is it better to isolate the Vcc or to leave it a continous plane? Are
there any application notes that might help me?



Thanks,

Farrokh Mottahedin
Systems Engineer

Quantum Corporation

Phone: (408)324-7934
Fax: (408)894-5653

email: fmottahe@qntm.com