RE : [SI-LIST] : IBIS Modeling

Weber Chuang (WeberChuang@via.com.tw)
Wed, 25 Mar 1998 17:34:58 +0800

We are PC chipset vendors, so we need to handle kinds of I/O pads and
modules, so far I use real module database and then combine it with
mainboard to run a backplane-style simulation for AGP and PCI and
memory, though we only consider capacitance effect for connector or
socket. Using lumped RLC to substitute for the trace yields odd and
inaccurate waveforms.

Best Regards

Weber Chuang(ChingFu Chuang)
SI Engineer, System Team.
VIA Technologies, Inc.
Taipei, Taiwan, ROC
http://www.via.com.tw
Very Innovative Architecture

******************** Re: [SI-LIST] : IBIS Modeling
*********************

> At 11:22 AM 3/24/98 -0700, D. C. Sessions wrote:
> >In brief, the answer is that IBIS device models are *not* good
> enough.
> >You absolutely need to model the substrate and the terminators (DIMM
> >series resistors) on them. IBIS 3.1 includes the capability of
> >defining Electrical Board Descriptions, which are basically
> simplified
> >netlists of the PWB. The examples given are in fact memory modules.
> >D. C. Sessions
> >dc.sessions@tempe.vlsi.com
>
> We have built DIMM and SIMM module modules using IBIS 2.1 that do
> a reasonable simulation job. It requires a bit of playing with the
> package model and it is somewhat simulator dependant. Our simulator
> interpretes
> large RLC package values as transmission lines instead of lumped LC
> parameters
> which allows us to make a reasonable DIMM or SIMM module module using
> IBIS 2.1 To accomplish this we create a full circuit boad model of the
> DIMM or SIMM and then tweak an IBIS package model until it looks
> the same under several simulation conditions. The die model input
> capacitance
> must also be increased to account for the extra loading.
>
> While I agree IBIS 3.x makes this relatively easy and provides a more
> accurate
> result it is possible to get usable results with 2.1 prior to the
> release of
> the 3.x parser.
>
>
>
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>
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