* Help define/diagnose/solve complex signal fidelity problems (clock
generation/distribution, interconnect design, timing, termination,
decoupling, power/ground distribution, package/connector selection,
* You should have at least 1 year experience in field (signal fidelity
and analog issues related to high speed digital design and/or analog
circuit design) for the junior/entry level signal fidelity position.
* If you have several years experience in this field, you can fulfill my=
senior signal fidelity position.
* You should have hands-on experience with modeling and simulating with
Quad Design tools (MOTIVE, XTK, TLC), SPICE (PSPICE and HSPICE),
electromagnetic field solvers (Greenfield, Pacific Numerix, Maxwell 3D,
etc). Candidate should be familiar with high speed board interconnect
routers (Allegro and CCT router preferred). Experience with
Interconnectix is a major plus. Candidate should also be familiar with
high speed test plan development, test measurements techniques and lab
equipment (HP and Tektronix). Experience with current high speed
processors and multiple logic families is desirable. Other pluses are
experience with custom ASIC cell design, phase lock loops, PCI Bus, SCSI=
bus, and web-based documentation.
=2E Education: BS degree minimum.
It s an exciting time here at Stratus =
Come Join our team. =
Please call me at (508) 490-6231
Or email me at: Steve_Mango@stratus.com