[SI-LIST] : Mixed signal - PWR and GND configuration issue

Chris Roberts (croberts@taskit.com)
Fri, 17 Jul 1998 15:51:21 -0400

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I am currently designing a high speed (50+ MHz) mixed signal board =
that is used in a larger multimodule system. There are a number of both =
A/D and D/A Converters on the board with two distinct areas of analog =
and digital processing circuitry. We are able to maintain pretty good =
physical isolation between the IF analog block and the high speed =
digital signal processing block. I am looking for some input on how to =
handle the power and ground structure of this board to maintain the =
signal integrity of the analog circuit. We do currently have separate =
analog and digital power supplies available. =20
=20
There are three main areas of concern. =20
=20
First, how do we best handle the ground boundary between the analog and =
digital circuits given that we have multiple ADCs and DACs straddling =
this boundary? Should we use one solid GND plane? If not, how should =
they then be tied together (if at all?) to avoid gound loop issues? =20
=20
Second, how should we handle the board ground relative to chassis=20
GND. Should we tie the analog GND, digital GND, or both to chassis GND =
on this board or should the only connection to chassis GND be at the =
power supply?=20
=20
Third, within the analog circuit, we have isolation concerns between =
high and low level analog signals. We are looking for the best power =
supply filtering solution (ferrite beads?) which will allow us to better =
isolate the sections of the analog circuit from each other.
=20
Thanks
=20
Chris Roberts, Telecom Analysis Systems
croberts@taskit.com

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      I am currently designing a high speed (50+ MHz) mixed = signal board=20 that is used in a larger multimodule system.  There are a number of = both=20 A/D and D/A Converters on the board with two distinct areas of analog = and=20 digital processing circuitry.  We are able to maintain pretty good = physical=20 isolation between the IF analog block and the high speed digital signal=20 processing block.  I am looking for some input on how to handle the = power=20 and ground structure of this board to maintain the signal integrity of = the=20 analog circuit.  We do currently have separate analog and digital = power=20 supplies available.        =20
 
There are = three main areas=20 of concern. 
 
First,  = how do we best=20 handle the ground boundary between the analog and digital circuits given = that we=20 have multiple ADCs and DACs straddling this boundary?  Should we = use one=20 solid GND plane?  If not, how should they then be tied together (if = at=20 all?) to avoid gound loop issues? 
 
Second,  = how should we=20 handle the board ground relative to chassis
GND.  = Should we tie the=20 analog GND, digital GND, or both to chassis GND on this board or should = the only=20 connection to chassis GND be at the power supply?
 
Third, within = the analog=20 circuit, we have isolation concerns between high and low level analog=20 signals.  We are looking for the best power supply filtering = solution=20 (ferrite beads?) which will allow us to better isolate the sections of = the=20 analog circuit from each other.
 
Thanks
 
Chris Roberts, Telecom Analysis Systems
croberts@taskit.com
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