[SI-LIST] : Excessive clock overshoot

fabrizio zanella (fabrizio=zanella%eng%[email protected])
Wed, 13 May 98 16:16:51 -0400

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I have a question regarding an FCT clock (TTL levels) driving a heavily
loaded backplane. On the driver pin we see excessive overshoot on the L-H
transition which increases as we increase the clock frequency. This
overshoot goes from 5V at 33MHz to 6.5-7.0V at 45MHz. The stub impedance
is 75 ohms, backplane impedance 25 ohms loaded. There is a clamping diode
on the H-L side but not on the L-H. The H-L side does not have any
undershoot.
I have asked the manufacturer and they have never seen this phenomena, nor
do they have an explanation for it.
Any ideas on what could be causing this?

thanks and regards,
Fabrizio Zanella
Design Engineer
EMC Corporation
508-435-1000
[email protected]

Next message: D. C. Sessions: "Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on?"
Previous message: Fred Balistreri: "Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on?"
Next in thread: D. C. Sessions: "Re: [SI-LIST] : Excessive clock overshoot"