si-list.mail by thread
Starting: Sun 03 Jan 1999 - 10:51:45 PDT
Ending: Wed 20 Oct 1999 - 10:53:47 PDT
Messages: 1959
- [SI-LIST] : Vocabulary of Signal Integrity Degradations Abe Riazi
- [SI-LIST] : Traces Impedance without plane Michel Bazinet
- RE: [SI-LIST] : Vocabulary of Signal Integrity Degradations Abe Riazi
- RE: [SI-LIST] : Traces Impedance without plane Andrew Ingraham
- [SI-LIST] : Seeking Volunteer Presenters, Boston (MA,USA) area Jeff Seeger
- [SI-LIST] : Mixing GTLP Tx with GTL Rx Tony Joyner
- [SI-LIST] : looking for info on Hspice vs Star-Sim comparison Pat Zabinski
- [SI-LIST] : PCB Top Gun Hall of Fame Contest -- Enter Now!!! Ronda Faries
- RE : [SI-LIST] : looking for info on Hspice vs Star-Sim compariso Weber Chuang
- [SI-LIST] : "Spread Spectrum Clock Techniques" talk in Santa Clara CA [email protected]
- RE : [SI-LIST] : looking for info on Hspice vs Star-Sim comparison [email protected]
- [SI-LIST] : Power/Gnd Pin Input Impedance ycchien
- RE: [SI-LIST] : Power/Gnd Pin Input Impedance Dima Smolyansky
- [SI-LIST] : Interconnect modeling from measurements Dima Smolyansky
- RE: [SI-LIST] : Power/Gnd Pin Input Impedance Andrew Ingraham
- RE: [SI-LIST] : Power/Gnd Pin Input Impedance Mellitz, Richard
- [SI-LIST] : Slightly different signal integrity problem Lund, Steve
- [SI-LIST] : IC impedance Alok Tripathi
- [SI-LIST] : Re: [SI-LIST]:Mixing GTLP Tx with GTL Rx Jack Marshall
- [SI-LIST] : Transmission Lines Formulae Lum Wee Mei
- RE: [SI-LIST] : Transmission Lines Formulae Andrew Ingraham
- Re: [SI-LIST] : Slightly different signal integrity problem Pat Zabinski
- [SI-LIST] : Mutual capacitamce and inductance Hall, Stephen H
- RE: [SI-LIST] : Mutual capacitance and inductance Hall, Stephen H
- RE: [SI-LIST] : Mutual capacitamce and inductance Chan, Michael
- RE: [SI-LIST] : Transmission Lines Formulae Eric Bogatin
- Re: RE: [SI-LIST] : Mutual capacitance and inductance Craig Clewell
- Re: RE: [SI-LIST] : Mutual capacitance and inductance Craig Clewell
- [SI-LIST] : Flatpanel VGA questions Lenny Baledge
- RE: [SI-LIST] : Transmission Lines Formulae Muranyi, Arpad
- RE: RE: [SI-LIST] : Mutual capacitance and inductance Hall, Stephen H
- RE: RE: [SI-LIST] : Mutual capacitance and inductance Hall, Stephen H
- Re: [SI-LIST] : Mutual capacitance and inductance [email protected]
- RE: [SI-LIST] : Power/Gnd Pin Input Impedance tomda
- [SI-LIST] : Transmission Line Formulae Jack Marshall
- Re[2]: [SI-LIST] : Transmission Lines Formulae [email protected]
- RE: [SI-LIST] : Mutual capacitance and inductance Kowal, Keith
- Re: [SI-LIST] : Transmission Lines Formulae Mike Degerstrom
- [SI-LIST] : Searching For Equations Governing Serpentine Traces Abe Riazi
- Re: [SI-LIST] : Searching For Equations Governing Serpentine [email protected]
- RE: [SI-LIST] : Searching For Equations Governing Serpentine Trac Hall, Stephen H
- Re: [SI-LIST] : Searching For Equations Governing Serpentine Douglas McKean
- RE: [SI-LIST] : Searching For Equations Governing Serpentine Trac Mellitz, Richard
- RE: [SI-LIST] : Searching For Equations Governing Serpentine Trac Mellitz, Richard
- [SI-LIST] : CBT for Signal Integrity [email protected]
- RE: [SI-LIST] : Searching For Equations Governing Serpentine Traces Abe Riazi
- [SI-LIST] : Hspice analysis of IBIS model steve johnson
- [SI-LIST] : SI courses [email protected]
- [SI-LIST] : driving a 300pF load Miller Jeff-FJM039
- [SI-LIST] : EIAJ is mulling over a more accurate Spice model Savithri S.
- RE: [SI-LIST] : SI courses Eric Bogatin
- [SI-LIST] : Where can ifind data on SSTL and/or RAMBUS technology Yehuda D. Yizraeli
- [SI-LIST] : RAMBUS [email protected]
- Re: [SI-LIST] : Where can ifind data on SSTL and/or RAMBUS [email protected]
- RE: [SI-LIST] : CBT for Signal Integrity Andrew Ingraham
- [SI-LIST] : Meeting, Boston area, Power Distribution and Performance Jeff Seeger
- [SI-LIST] : IBIS to spice massimo gaspari ++39 010 6002 534
- [SI-LIST] : Hyperlinx [email protected]
- RE: [SI-LIST] : Hyperlinx Anderson, Robert G
- RE: [SI-LIST] : Hyperlinx Dave Komma
- RE: [SI-LIST] : Hyperlinx Gardiner, Scott
- [SI-LIST] : Thanks Folks! [email protected]
- [SI-LIST] : IBIS to SPICE massimo gaspari ++39 010 6002 534
- [SI-LIST] : Exciting Opening at Sun-Menlo Park, CA Mike Fleice [CONTRACTOR]
- [SI-LIST] : web documentation system testing Kyla Cragg
- [SI-LIST] : HSPICE lossy w element [email protected]
- [SI-LIST] : HSPICE lossy w element [email protected]
- [SI-LIST] : Book for sale Todd Nichols
- [SI-LIST] : Oscillation in lumped circuits and transmission lines Arani Sinha
- [SI-LIST] : IDE bus question Robert Stuart
- RE: [SI-LIST] : Oscillation in lumped circuits and transmission l Peterson, James F
- Re: [SI-LIST] : Oscillation in lumped circuits and transmission l ines J. Eric Bracken
- [SI-LIST] : Re: Book for sale Todd Nichols
- Re: [SI-LIST] : Oscillation in lumped circuits and transmission l Dima Smolyansky
- FW: [SI-LIST] : Oscillation in lumped circuits and transmission l Johnson, David
- RE: [SI-LIST] : IDE bus question Farrokh Mottahedin
- [SI-LIST] : viewing the output of LARGE hspice transient runs Ray Anderson
- Re: [SI-LIST] : Oscillation in lumped circuits and transmission l ines Fred Balistreri
- RE: [SI-LIST] : Oscillation in lumped circuits and transmission l Peterson, James F
- RE: [SI-LIST] : Oscillation in lumped circuits and transmission l Peterson, James F
- Re: [SI-LIST] : viewing the output of LARGE hspice transient runs Mike Degerstrom
- [SI-LIST] : Re: viewing the output of LARGE hspice transient runs [email protected]
- (Fwd) [SI-LIST] : Re: viewing the output of LARGE hspice transient runs Pat Zabinski
- RE: [SI-LIST] : viewing the output of LARGE hspice transient runs Mellitz, Richard
- [SI-LIST] : High speed design guides available ? Daniel Roganti
- [SI-LIST] : EMC quiet serial device??? Roland F. Portman
- Re: [SI-LIST] : EMC quiet serial device??? Douglas McKean
- FW: [SI-LIST] : EMC quiet serial device??? Johnson, David
- [SI-LIST] : EMC quiet serial device: Followup??? Roland F. Portman
- [SI-LIST] : EMC presentation in Orange County Pat Zabinski
- [SI-LIST] : agc amplifier Gary
- Re: [SI-LIST] : EMC quiet serial device??? Tom gandy
- RE: [SI-LIST] : Oscillation in lumped circuits and Vadim Heyfitch
- [SI-LIST] : Atomic animation Doug Brooks
- [SI-LIST] : Differential Signals M. Susan Tweeton
- RE: [SI-LIST] : Atomic animation Warren, Steve
- [SI-LIST] : differential signals wangyanfang
- [SI-LIST] : IBIS Accuracy Specification First Draft [email protected]
- [SI-LIST] : SMA connector routing Ellis, John R
- RE: [SI-LIST] : SMA connector routing Andrew Ingraham
- RE: [SI-LIST] : Atomic animation Heyfitch, Vadim
- [SI-LIST] : EUROPEAN IBIS SUMMIT MEETING REMINDER Bob Ross
- [SI-LIST] : Re: Atomic animation Christian Schuster
- FWIW - RE: [SI-LIST] : Atomic animation Douglas McKean
- FW: FWIW - RE: [SI-LIST] : Atomic animation Johnson, David
- [SI-LIST] : Differential Transmission Lines [email protected]
- [SI-LIST] : Simulation Implications of Pin and Package Parasitics Abe Riazi
- [SI-LIST] : Pass-through vias as BGA lands (?) Arrigo Benedetti
- [SI-LIST] : AGENDA - EUROPEAN IBIS SUMMIT MEETING Bob Ross
- [SI-LIST] : SI opening at Intel, Folsom, CA Muranyi, Arpad
- [SI-LIST] : AMPredictor=?iso-8859-1?Q?=AE_Signal_Integrity_Analyzer_(SIA)?= [email protected]
- [SI-LIST] : BGA vs Leaded package electrical performance greg kimball
- [SI-LIST] : =?ISO-8859-1?Q?RE=3A_=5BSI-LIST=5D_=3A_AMPredictor=AE_Signal_I?= Kowal, Keith
- [SI-LIST] : Logic, Circuit, and Physical Designers wanted Matt Kaufmann
- [SI-LIST] : T-line models & simulation Lynne Green
- [SI-LIST] : A Question About Power Noise. kidong lee
- RE: [SI-LIST] : A Question About Power Noise. Chan, Michael
- [SI-LIST] : protection of information Pat Zabinski
- RE: [SI-LIST] : A Question About Power Noise. Zhang, Michael T
- RE: [SI-LIST] : A Question About Power Noise. Ray Anderson
- RE: [SI-LIST] : A Question About Power Noise. Zhang, Michael T
- RE: [SI-LIST] : A Question About Power Noise. Ray Anderson
- [SI-LIST] : BGA vs Leaded - summary greg kimball
- Q:Via Capacitance....Re: [SI-LIST] : Pass-through vias as BGA lands (?) Daniel Roganti
- Re: Q:Via Capacitance....Re: [SI-LIST] : Pass-through vias as BGA lands Laurence Michaels
- Re: [SI-LIST] : BGA vs Leaded - summary [email protected]
- [SI-LIST] : Re: Q:Via Capacitance Bob Perlman
- [SI-LIST] : limitations of spice for SI modelling Christopher Albert
- [SI-LIST] : limitations of spice for SI modelling Christopher Albert
- RE: [SI-LIST] : BGA vs Leaded - summary tomda
- re: Q:Via Capacitance....Re: [SI-LIST] : Pass-through vias a... fabrizio zanella
- [SI-LIST] : Power Supply PCB Design Arun Chandrashekar
- [SI-LIST] : Slow falling edge of a signal. [email protected]
- [SI-LIST] : Re: Chang_Ie_Hwaa
- Re: Q:Via Capacitance....Re: [SI-LIST] : Pass-through vias as BGA lands Chandrakant Hemraj Sakharwade
- RE: [SI-LIST] : Slow falling edge of a signal. Andrew Ingraham
- [SI-LIST] : Mux. of clock sources lkd
- Re: Q:Via Capacitance....Re: [SI-LIST] : Pass-through vias a... David Instone
- Re: [SI-LIST] : BGA vs Leaded - summary [email protected]
- [SI-LIST] : si-list Web Site Archives Update Notice Ray Anderson
- [SI-LIST] : slides file of the IPC Boston chapter Feb 9 presentations is available Istvan Novak - Board Design Technology
- [SI-LIST] : Looking for a sensitive Gigabit receiver part Dr. Edward P. Sayre
- [SI-LIST] : signal propagation questions Leesa Noujeim
- [SI-LIST] : job posting Ken Willis
- RE: [SI-LIST] : signal propagation questions Shenoy, Jay
- Re: [SI-LIST] : signal propagation questions Doug Brooks
- Fw: [SI-LIST] : Looking for a sensitive Gigabit receiver part John Anderson
- Re: [SI-LIST] : RE: [SI-LIST] : AMPredictor� Signal Integrity Analyzer (SIA) Larry McMillan
- [SI-LIST] : Missing Person [email protected]
- [SI-LIST] : FPC impedance control [email protected]
- RE: [SI-LIST] : Missing Person John Philips
- RE: [SI-LIST] : RE: [SI-LIST] : AMPredictor. Signal Integrity Ana Kowal, Keith
- RE: [SI-LIST] : FPC impedance control Kowal, Keith
- [SI-LIST] : FPC impedance control [email protected]
- RE: [SI-LIST] : Looking for a sensitive Gigabit receiver part Chris Knapton
- RE: [SI-LIST] : FPC impedance control tomda
- Re: [SI-LIST] : A Question About Power Noise. Pat Zabinski
- FW: [SI-LIST] : A Question About Power Noise. Heyfitch, Vadim
- RE: [SI-LIST] : A Question About Power Noise. Zhang, Michael T
- [SI-LIST] : Power Noise Jon Keeble
- [SI-LIST] : Power Noise Jon Keeble
- RE: [SI-LIST] : A Question About Power Noise. Grasso, Charles
- [SI-LIST] : 3rd International IEEE Workshop "Signal Propagation on Interconnects" Hartmut Grabinski
- [SI-LIST] : Geometry-Transfer from I-DEAS to EMAS Schulte, Michael
- [SI-LIST] : Transmission Line Thy Applied to short interconnects greg kimball
- [SI-LIST] : Duplicate Messages Mark Randol
- [SI-LIST] : Sr. Staff/Principal Engineer-Field Solver Sandy Taylor
- [SI-LIST] : Return Loss William Mackillop
- [SI-LIST] : Thank you for suggestions of FPC impedance control [email protected]
- [SI-LIST] : Consulting on SI issues David Sherman
- [SI-LIST] : Modeling power noise Christian S. Rode
- [SI-LIST] : Re: About your SILIST comments Mark Randol
- [SI-LIST] : Position available for RF simulation Kyung Suk
- Re: [SI-LIST] : Duplicate Messages John Fisher
- [SI-LIST] : thick board & V/gnd microvias john lipsius
- [SI-LIST] : Opamp spice model Rajkumar
- [SI-LIST] : How board over-shoot under-shoot influence a chip. Yehuda D. Yizraeli
- Subject: Re: [SI-LIST] : How board over-shoot under-shoot influence a chip. Jon Powell
- RE: [SI-LIST] : How board over-shoot under-shoot influence a chip Andrew Ingraham
- Re: [SI-LIST] : How board over-shoot under-shoot influence a [email protected]
- [SI-LIST] : si-list duplicate messages Ray Anderson
- Re: [SI-LIST] : Opamp spice model J. Eric Bracken
- RE: [SI-LIST] : Opamp spice model Shenoy, Jay
- [SI-LIST] : Ferrite Bead models Grasso, Charles
- Re: [SI-LIST] : Ferrite Bead models John Lockwood
- [SI-LIST] :EMI filtering and ESD protection Greenhut Avi-BCMS17
- [SI-LIST] : Memory Burn-In Board & Driver's Characteristics [email protected]
- [SI-LIST] : Anyone interested in PCB Design Techniques for SI & EMC? Grasso, Charles
- RE: [SI-LIST] : Ferrite Bead models Michael Zhang
- Re: [SI-LIST] : Anyone interested in PCB Design Techniques for SI & EMC? Pat Zabinski
- [SI-LIST] : Ground gap problem Sangil
- [SI-LIST] : si-list policy on HTML postings Ray Anderson
- [SI-LIST] : Asymmetric Striplines Configuration Abdullah, Mohd Muhaiyiddin
- Re: [SI-LIST] : Ground gap problem John Lockwood
- [SI-LIST] : ps-resolution [email protected]
- AW: [SI-LIST] : Anyone interested in PCB Design Techniques for SI & EMC? Andreas Lenkisch
- [SI-LIST] : Please stop with the 'me, too' messages. Laurence Michaels
- [SI-LIST] : Different board vendors different impedances Katie Rothstein
- RE: [SI-LIST] : ps-resolution Steve Wurzer
- RE: [SI-LIST] : ps-resolution tomda
- [SI-LIST] : Improved online decoupling model Christian S. Rode
- Re: [SI-LIST] : How board over-shoot under-shoot influence a Chuck Hill
- Re: [SI-LIST] : Ground gap problem Douglas McKean
- [SI-LIST] : Periodic Obligatory Warning on Proprietary Postings Ray Anderson
- RE: [SI-LIST] : Different board vendors different impedances tomda
- [SI-LIST] : Long, uni-dir bus with multiple loads termination Chris Bobek
- Re: [SI-LIST] : Long bus, terminate or star? Ron Miller
- [SI-LIST] : Materials from MMontrose PCB Design Techniques for SI & EMC Grasso, Charles
- R:[SI-LIST] : Materials from MMontrose PCB Design Techniques for SI & Rossi Giuseppe
- Re: R:[SI-LIST] : Materials from MMontrose PCB Design Techniques for SI & Fred Dieckmann
- R:R:[SI-LIST] : Materials from MMontrose PCB Design Techniques fo r SI Rossi Giuseppe
- RE: R:[SI-LIST] : Materials from MMontrose PCB Design Techniques Andrew Ingraham
- Re: [SI-LIST] : Long bus, terminate or star? D. C. Sessions
- [SI-LIST] : Transmission line inductance Josip Popovic
- Re: [SI-LIST] : Anyone interested in PCB Design Techniques for SI & EMC? -----Original Message----- Geoff Schofield
- [SI-LIST] : source for AVX small inductance caps Arrigo Benedetti
- [SI-LIST] : ECL prescaler David Chengson
- [SI-LIST] : Materials from MMontrose PCB Design Techniqu Elya B. Joffe
- [SI-LIST] : Critical Length Abe Riazi
- [SI-LIST] : source for AVX small inductance caps Alastair Hardie
- [SI-LIST] : Package Parasitics Modelling [email protected]
- [SI-LIST] : Nvidia hiring Signal integrity engineers Michael Nagy
- [SI-LIST] : Conference Announcement - VLSI'99: Xth IFIP Conference on VLSI Luis Miguel Silveira
- RE: [SI-LIST] : source for AVX small inductance caps BILL ANTHONY
- RE: [SI-LIST] : Package Parasitics Modelling Andrew Ingraham
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Hall, Stephen H
- RE: [SI-LIST] : source for AVX small inductance caps Andrew Ingraham
- RE: [SI-LIST] : RE: [SI-LIST]: Long bus or star? Mellitz, Richard
- [SI-LIST] : Power supply modeling... Christian S. Rode
- RE: [SI-LIST] : Package Parasitics Modelling tomda
- RE: [SI-LIST] : RE: [SI-LIST]: Long bus or star? Coleman, Dave
- Re: [SI-LIST] : Package Parasitics Modelling Lynne Green
- Re: [SI-LIST] : Package Parasitics Modelling Lynne Green
- RE: [SI-LIST] : Package Parasitics Modelling Abe Riazi
- RE: [SI-LIST] : Critical Length Abe Riazi
- RE: [SI-LIST] : Critical Length =?Big5?B?u6+kaLPHIChzY2NoYW8p?=
- Re: [SI-LIST] : Power supply modelling... [email protected]
- Re: [SI-LIST] : Power supply modelling... [email protected]
- [SI-LIST] : "Damn Fast" buffer [email protected]
- [SI-LIST] : RE: Long bus or star? Hans Mellberg
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Jon Keeble
- RE: [SI-LIST] : Critical Length Peterson, James F
- [SI-LIST] : Interconnect modeling from TDR measurements Dima Smolyansky
- [SI-LIST] : Exciting SI opening at EMC fabrizio zanella
- [SI-LIST] : Re: SPAM D. C. Sessions
- [SI-LIST] : Differential clock jitter and switching noise Luis Gonzalez
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Grebenkemper, John
- RE: [SI-LIST] : Re: SPAM Lund, Steve
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Jon Keeble
- Re: [SI-LIST] : Re: SPAM [email protected]
- RE: [SI-LIST] : RE: [SI-LIST]: Long bus or star? Mackillop, William J.
- [SI-LIST] : Low Voltage CMOS question Bill Dempsey
- [SI-LIST] : Current-steering output design references Krishnan Rangarajan / India Design Center
- Re: [SI-LIST] : Re: SPAM [email protected]
- Re: [SI-LIST] : Differential clock jitter and switching noise Chuck Hill
- [SI-LIST] : About HSPICE model chenlanbing
- [SI-LIST] : high-power board Pat Zabinski
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Josip Popovic
- RE: [SI-LIST] : RE: [SI-LIST]: Long bus or star? Volk, Andrew M
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Bob Perlman
- RE: [SI-LIST] : RE: [SI-LIST]: Long bus or star? Shayle Hirschman
- RE: [SI-LIST] : "Damn Fast" buffer Hurst, Joe
- [SI-LIST] : RE: [SI-LIST]: Long bus or star? Grebenkemper, John
- [SI-LIST] : Tangent on Long bus or star? Hans Mellberg
- [SI-LIST] : 3rd International IEEE Workshop "Signal Propagation on Interconnects" Hartmut Grabinski
- [SI-LIST] : Termination Examples Available? Chris Bobek
- [SI-LIST] : Q: HSPICE w-elements' RLCGs - conversion coefficients from XFX Heyfitch, Vadim
- Re: [SI-LIST] : Q: HSPICE w-elements' RLCGs - conversion coefficients from XFX Pat Zabinski
- Re: [SI-LIST] : Termination Examples Available? Ed Murphy
- Re: [SI-LIST] : Q: HSPICE w-elements' RLCGs - conversion coefficients from XFX Mike Degerstrom
- Re: [SI-LIST] : Q: HSPICE w-elements' RLCGs - conversion coefficients Laurence Michaels
- Re: [SI-LIST] : Q: HSPICE w-elements' RLCGs - conversioncoefficients Ron Miller
- [SI-LIST] : It's Spring in Texas! [email protected]
- [SI-LIST] : reduce EMI from crystal oscillator ckt Chang_Ie_Hwaa
- RE: [SI-LIST] : high-power board tomda
- [SI-LIST] : SI book available Mike Keenly
- RE: [SI-LIST] : About HSPICE model George Borkowicz
- RE: [SI-LIST] : Q: HSPICE w-elements' RLCGs - conversion coeffici Heck, Howard
- [SI-LIST] : TDR measurements Khalid Ansari
- RE: [SI-LIST] : TDR measurements Dima Smolyansky
- RE: [SI-LIST] : Need information on inexpensive Circuit simulatio [email protected]
- [SI-LIST] : Need information on inexpensive Circuit simulation tools Kowal, Keith
- RE: [SI-LIST] : Need information on inexpensive Circuit simulatio Preston Andrew MMUk
- Re: [SI-LIST] : Need information on inexpensive Circuit [email protected]
- RE: [SI-LIST] : Need information on inexpensive Circuit simulatio Andrew Ingraham
- [SI-LIST] : About the Eye Patterns and the terminations of bus chenlanbing
- [SI-LIST] : About the eye pattern of high speed backplane chenlanbing
- [SI-LIST] : mini co-ax John Fisher
- RE: [SI-LIST] : mini co-ax Kowal, Keith
- RE: [SI-LIST] : mini co-ax Joe Chlebda
- [SI-LIST] : RE: obennig
- [SI-LIST] : RE: Benny Lima
- [SI-LIST] : fork, endfork and more fork Syed Huq
- [SI-LIST] : Mini-coaxial cable [email protected]
- Re: [SI-LIST] : Mini-coaxial cable John Fisher
- [SI-LIST] : Chip level Vs Board level SI Arun Chandrashekar
- FW: [SI-LIST] : Chip level Vs Board level SI Shenoy, Jay
- [SI-LIST] : Handy little models D. C. Sessions
- [SI-LIST] : An Interesting Presentation Abe Riazi
- [SI-LIST] : Howard Johnson Presentation X2Y Attenuators, LCC.
- Re: [SI-LIST] : An Interesting Presentation Chuck Hill
- RE: [SI-LIST] : An Interesting Presentation Farrokh Mottahedin
- [SI-LIST] : Re: forks & such Gary Crowell
- RE: [SI-LIST] : An Interesting Presentation Ingraham, Andrew
- RE: [SI-LIST] : An Interesting Presentation Magnus Homann
- RE: [SI-LIST] : An Interesting Presentation Ingraham, Andrew
- Re: [SI-LIST] : An Interesting Presentation Howard Johnson
- RE: [SI-LIST] : An Interesting Presentation Ingraham, Andrew
- RE: [SI-LIST] : An Interesting Presentation Ingraham, Andrew
- Re: [SI-LIST] : An Interesting Presentation Howard Johnson
- RE: [SI-LIST] : An Interesting Presentation Abe Riazi
- RE: [SI-LIST] : An Interesting Presentation Howard Johnson
- RE: [SI-LIST] : An Interesting Presentation Mellitz, Richard
- RE: [SI-LIST] : An Interesting Presentation Hans Mellberg
- [SI-LIST] : Signal Polarities Kassem Abdallah
- [SI-LIST] : Broadside Coupled Traces [email protected]
- RE: [SI-LIST] : Broadside Coupled Traces Silbert, Steven F.
- RE: [SI-LIST] : Signal Polarities tomda
- RE: [SI-LIST] : Signal Polarities Volk, Andrew M
- Re: [SI-LIST] : Signal Polarities Lynne Green
- RE: [SI-LIST] : Signal Polarities Ingraham, Andrew
- RE: [SI-LIST] : Signal Polarities Stephen Peters
- RE: [SI-LIST] : Broadside Coupled Traces Chan, Michael
- RE: [SI-LIST] : Broadside Coupled Traces Dr. Edward P. Sayre
- Re: [SI-LIST] : Broadside Coupled Traces Michael E Vrbanac
- Re: [SI-LIST] : FPC impedance control Andy Burkhardt
- [SI-LIST] : HAPPY99 virus DONOT click it... Lynne Green
- [SI-LIST] : 2000 International Symposium on Quality of Electronic Design Grebenkemper, John
- RE: [SI-LIST] : Chip level Vs Board level SI Shenoy, Jay
- [SI-LIST] : Chip level Vs Board level SI Sandy Taylor
- [SI-LIST] : Vote on IBIS Version 3.2 (Standards Proposal 4557) Bob Ross
- Re: [SI-LIST] : Anyone interested in PCB Design Techniques for SI& EMC? Lum Wee Mei
- Re: [SI-LIST] : Broadside Coupled Traces Andy Burkhardt
- [SI-LIST] : Advice for long bus? Chris Bobek
- RE: [SI-LIST] : Advice for long bus? Kowal, Keith
- [SI-LIST] : Job Posting bgrossma
- [SI-LIST] : minimizing backplane clock jitter john lipsius
- [SI-LIST] : Introduction to Transmission Lines Christian S. Rode
- [SI-LIST] : Terminating a bidirectional bus Arrigo Benedetti
- RE: [SI-LIST] : Terminating a bidirectional bus Fox, Michael J
- Re: [SI-LIST] : Terminating a bi-directional bus Roy Leventhal
- RE: [SI-LIST] : Ground gap problem Fox, Michael J
- RE: [SI-LIST] : FPC impedance control Fox, Michael J
- [SI-LIST] : Spreadsheet for calculation of max data transfer Georg Ramsch
- RE: [SI-LIST] : Ground gap problem Ingraham, Andrew
- RE: [SI-LIST] : Ground gap problem Ingraham, Andrew
- RE: [SI-LIST] : Terminating a bidirectional bus Ingraham, Andrew
- [SI-LIST] : Jitter John Fisher
- [SI-LIST] : Jitter book found John Fisher
- [SI-LIST] : Online crosstalk simulation Christian S. Rode
- FW: [SI-LIST] : FPC impedance control Alderete, Michael
- Re: [SI-LIST] : Jitter book found John Fisher
- RE: FW: [SI-LIST] : FPC impedance control Alderete, Michael
- RE: FW: [SI-LIST] : FPC impedance control Heyfitch, Vadim
- Re: [SI-LIST] : Jitter book [email protected]
- [SI-LIST] : Another online simulation Christian S. Rode
- [SI-LIST] : Another online simulation Christian S. Rode
- [SI-LIST] : Looking Inside IBIS Model Abe Riazi
- RE: [SI-LIST] : Looking Inside IBIS Model =?big5?B?VGluZywgU3RldmUgKKRCvW69ZCk=?=
- RE: [SI-LIST] : Looking Inside IBIS Model Beal, Weston
- RE: [SI-LIST] : Looking Inside IBIS Model Beal, Weston
- [SI-LIST] : Decoupling caps and power plane effects Bermensolo, Todd L
- Re: [SI-LIST] : Decoupling caps and power plane effects [email protected]
- RE: [SI-LIST] : Looking Inside IBIS Model Abe Riazi
- Re: [SI-LIST] : Decoupling caps and power plane effects Mike Degerstrom
- RE: [SI-LIST] : Decoupling caps and power plane effects Doug Piper
- RE: [SI-LIST] : Decoupling caps and power plane effects Chan, Michael
- RE: [SI-LIST] : Looking Inside IBIS Model Weber Chuang
- RE: [SI-LIST] : Looking Inside IBIS Model =?big5?B?VGluZywgU3RldmUgKKRCvW69ZCk=?=
- [SI-LIST] : use of this List Pat Zabinski
- RE: [SI-LIST] : use of this List Doug Piper
- RE: [SI-LIST] : Looking Inside IBIS Model Beal, Weston
- RE: [SI-LIST] : use of this List Beal, Weston
- RE: [SI-LIST] : Looking Inside IBIS Model Beal, Weston
- RE: [SI-LIST] : Looking Inside IBIS Model Chan, Michael
- [SI-LIST] : Network analysis references for PEEC technique Shenoy, Jay
- Fw: [SI-LIST] : use of this List Norm Ebsary
- RE: [SI-LIST] : Decoupling caps and power plane effects Dr. Edward P. Sayre
- RE: [SI-LIST] : Decoupling caps and power plane effects Shenoy, Jay
- RE: [SI-LIST] : Looking Inside IBIS Model =?big5?B?VGluZywgU3RldmUgKKRCvW69ZCk=?=
- [SI-LIST] : VLSI'99: Xth IFIP Conference on VLSI (2nd Call) Luis Miguel Silveira
- [SI-LIST] : SSTL Versus full swing PROS/CONS Yehuda D. Yizraeli
- RE: [SI-LIST] : Looking Inside IBIS Model Beal, Weston
- RE: [SI-LIST] : Looking Inside IBIS Model Mark Nass
- RE: [SI-LIST] : Looking Inside IBIS Model Abe Riazi
- RE: [SI-LIST] : Looking Inside IBIS Model Chris Rokusek
- RE: [SI-LIST] : Looking Inside IBIS Model Mellitz, Richard
- RE: [SI-LIST] : Online crosstalk simulation [...more comments?] Alderete, Michael
- RE: [SI-LIST] : use of this List Grasso, Charles
- RE: [SI-LIST] : Looking Inside IBIS Model Mark Nass
- RE: [SI-LIST] : use of this List Ray Anderson
- Re: [SI-LIST] : Network analysis references for PEEC technique Wis_macomson
- [SI-LIST] : What speed scope should I consider? Chris Bobek
- RE: [SI-LIST] : What speed scope should I consider? Krull, Nick J
- RE: [SI-LIST] : What speed scope should I consider? Dima Smolyansky
- RE: [SI-LIST] : What speed scope should I consider? tomda
- RE: [SI-LIST] : What speed scope should I consider? Ingraham, Andrew
- RE: [SI-LIST] : What speed scope should I consider? Ingraham, Andrew
- AW: [SI-LIST] : What speed scope should I consider? Andreas Lenkisch
- [SI-LIST] : PC100 SODIMM DRAM DQ Net Simulations [email protected]
- [SI-LIST] : Signal Integrity Workshops Ed Lewis
- RE: [SI-LIST] : SSTL Versus full swing PROS/CONS Muranyi, Arpad
- FW: [SI-LIST] : SSTL Versus full swing PROS/CONS -- Acronyms Johnson, David
- RE: [SI-LIST] : SSTL Versus full swing PROS/CONS -- Acronyms Fox, Michael J
- RE: [SI-LIST] : SSTL Versus full swing PROS/CONS -- Acronyms Ingraham, Andrew
- Re: [SI-LIST] : SSTL Versus full swing PROS/CONS -- Acronyms Mark Randol
- [SI-LIST] : Acronyms Douglas McKean
- Re: [SI-LIST] : SSTL Versus full swing PROS/CONS] D. C. Sessions
- RE: [SI-LIST] : Decoupling caps and power plane effects Jon Keeble
- [SI-LIST] : Capacitance in a Ceramic changes ?i usedf Kowal, Keith
- Re: [SI-LIST] : Capacitance in a Ceramic changes Michael Nagel
- RE: [SI-LIST] : Capacitance in a Ceramic changes ?i usedf John Philips
- RE: [SI-LIST] : Capacitance in a Ceramic changes ?i usedf Kowal, Keith
- [SI-LIST] : SI European Workshops - Amendment to Dates Ed Lewis
- RE: [SI-LIST] : Capacitance in a Ceramic changes ?i usedf [email protected]
- RE: [SI-LIST] : Decoupling caps and power plane effects Ray Anderson
- RE: [SI-LIST] : SSTL Versus full swing PROS/CONS -- Acronyms Muranyi, Arpad
- [SI-LIST] : 20-H Rule for Power Planes Mark Freeman
- RE: [SI-LIST] : Acronyms list Muranyi, Arpad
- Re: [SI-LIST] : SSTL Versus full swing PROS/CONS -- Acronyms Mark Randol
- RE: [SI-LIST] : Decoupling caps and power plane effects Dr. John L. Prince, III
- RE: [SI-LIST] : 20-H Rule for Power Planes Mellitz, Richard
- [SI-LIST] : acronyms........SSTL Yehuda D. Yizraeli
- Re: [SI-LIST] : 20-H Rule for Power Planes Douglas McKean
- Re: [SI-LIST] : Acronyms Douglas McKean
- [SI-LIST] : Flat Ribbon Cable substitutes peter baxter
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E Vrbanac
- Re: [SI-LIST] : Flat Ribbon Cable substitutes John Fisher
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E Vrbanac
- RE: [SI-LIST] : 20-H Rule for Power Planes Tomm aldridge
- [SI-LIST] : Looking inside the IBIS model Todd Westerhoff
- RE: [SI-LIST] : 20-H Rule for Power Planes L D Miller
- RE: [SI-LIST] : 20-H Rule for Power Planes Mark Freeman
- RE: [SI-LIST] : 20-H Rule for Power Planes Chris Padilla
- Re: [SI-LIST] : 20-H Rule for Power Planes Ron Matthews
- [SI-LIST] : EMC at low frequencies Adrian Shiner
- FW: [SI-LIST] : EMC at low frequencies Johnson, David
- RE: [SI-LIST] : 20-H Rule for Power Planes Jon Keeble
- Re: [SI-LIST] : EMC at low frequencies Douglas McKean
- [SI-LIST] : Looking inside the IBIS model Todd Westerhoff
- RE: [SI-LIST] : 20-H Rule for Power Planes Chan, Michael
- [SI-LIST] : question about timing analysis Andrew Phillips
- Re: FW: [SI-LIST] : EMC at low frequencies Laurence Michaels
- RE: [SI-LIST] : 20-H Rule for Power Planes Aldridge, Tomm V
- [SI-LIST] : GBIC evaluation kit Jinhua Chen
- RE: [SI-LIST] : question about timing analysis Peterson, James F
- RE: [SI-LIST] : question about timing analysis Todd Westerhoff
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E. Vrbanac
- RE: [SI-LIST] : 20-H Rule for Power Planes Chan, Michael
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E Vrbanac
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E Vrbanac
- Re: [SI-LIST] : 20-H Rule for Power Planes Douglas McKean
- Re: [SI-LIST] : 20-H Rule for Power Planes Douglas McKean
- Re: [SI-LIST] : 20-H Rule for Power Planes John Lockwood
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E. Vrbanac
- RE: [SI-LIST] : 20-H Rule for Power Planes Todd Hubing
- [SI-LIST] : FYI ieee salary survey results [email protected]
- RE: [SI-LIST] : 20-H Rule for Power Planes Douglas McKean
- RE: [SI-LIST] : 20-H Rule for Power Planes John Lockwood
- Re: [SI-LIST] : 20-H Rule for Power Planes S. Weir
- Re: [SI-LIST] : 20-H Rule for Power Planes S. Weir
- RE: [SI-LIST] : 20-H Rule for Power Planes Jon Keeble
- RE: [SI-LIST] : 20-H Rule for Power Planes S. Weir
- Re: [SI-LIST] : 20-H Rule for Power Planes Michael E Vrbanac
- [SI-LIST] : Grounding & Shielding: Coupling Vs Radiation Roy Leventhal
- [SI-LIST] : low jitter PLL ? john lipsius
- RE: [SI-LIST] : low jitter PLL ? Ingraham, Andrew
- [SI-LIST] : IBIS Subcommittee Requests Input Regarding S2IBIS2 [email protected]
- [SI-LIST] : RE: IBIS Subcommittee Requests Input Regarding S2IBIS2 [email protected]
- [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS [email protected]
- [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS [email protected]
- Re: [SI-LIST] : 20-H Rule for Power Planes S. Weir
- [SI-LIST] : connector substitution for high speed signals =?Big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- RE: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS Beal, Weston
- [SI-LIST] : Re: connector substitution for high speed signals Chee Yee Chung
- RE: [SI-LIST] : connector substitution for high speed signals Beal, Weston
- RE: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to Kellee Crisafulli
- AW: [SI-LIST] : connector substitution for high speed signals Wallenhorst, Ulrich
- RE: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS Beal, Weston
- [SI-LIST] : VLSI'99: Xth IFIP Conference on VLSI (Final Call for Papers) Luis Miguel Silveira
- [SI-LIST] : eye pattern definition Ellis, John R
- RE: [SI-LIST] : eye pattern definition Farrokh Mottahedin
- Re: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to Kellee Crisafulli
- [SI-LIST] : Complex Math examples? Doug Brooks
- Re: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to [email protected]
- Re: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS Syed Huq
- =?iso-8859-1?Q?RE=3A_=5BSI=2DLIST=5D_=3A_IBIS_Subcommittee_For?= tomda
- RE: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS Marc Humphreys
- Re: [SI-LIST] : IBIS Subcommittee Formed to Review Spice to IBIS Ted Creedon
- RE: [SI-LIST] : Complex Math examples? Avrionova, Kristina
- [SI-LIST] : Complex Math examples? Doug Brooks
- [SI-LIST] : Problems with 3rd harmonics on Intel 820 Camino chipset? Per Torstein =?iso-8859-1?Q?R=F8ine?=
- [SI-LIST] : buried capacitance vendors? Gary L. Sanders
- [SI-LIST] : Problems with 3rd harmonics on Intel 820 Camino chipset? Larry Smith
- AW: [SI-LIST] : buried capacitance vendors? Andreas Lenkisch
- RE: [SI-LIST] : buried capacitance vendors? Jon Keeble
- RE: [SI-LIST] : connector substitution for high speed signals =?Big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- [SI-LIST] : Seeking information about heatsink. Liang, Hongbo
- RE: [SI-LIST] : connector substitution for high speed signals Steve Weir
- [SI-LIST] : FW: Seeking information about heatsink. Liang, Hongbo
- Re: [SI-LIST] : Seeking information about heatsink. Steve Weir
- AW: [SI-LIST] : buried capacitance vendors? Andreas Lenkisch
- Re: [SI-LIST] : FW: Seeking information about heatsink. Doug Yanagawa
- [SI-LIST] : How do you use buried capacitance? Chris Bobek
- Re: [SI-LIST] : How do you use buried capacitance? Steve Weir
- [SI-LIST] : REMINDER TO VOTE ON IBIS SP-4557 Bob Ross
- RE: [SI-LIST] : How do you use buried capacitance? Sweetman, Eric
- RE: [SI-LIST] : How do you use buried capacitance? Chris Padilla
- RE: [SI-LIST] : How do you use buried capacitance? S. Weir
- RE: [SI-LIST] : How do you use buried capacitance? Jon Keeble
- RE: [SI-LIST] : How do you use buried capacitance? Dave Hoover
- RE: [SI-LIST] : How do you use buried capacitance? Steve Weir
- [SI-LIST] : What is effect of adjacent signal layer on PCB on Zo? Chris Bobek
- RE: [SI-LIST] : How do you use buried capacitance? Grasso, Charles
- RE: [SI-LIST] : What is effect of adjacent signal layer on PCB on Dave Hoover
- RE: [SI-LIST] : How do you use buried capacitance? Roy Leventhal
- Re: [SI-LIST] : What is effect of adjacent signal layer on PCB Steve Weir
- [SI-LIST] : FW: Information on Connector Company IPEX? Doug Piper
- [SI-LIST] : Signal Integrity Job Opening Doug Piper
- [SI-LIST] : Looking for Recommendations Douglas McKean
- [SI-LIST] : Future I/O Physical or Cable Requirements Doug Piper
- [SI-LIST] : Bonding options to short Busses on a die R.S. Krishnan
- RE: [SI-LIST] : What is effect of adjacent signal layer on PCB on Ingraham, Andrew
- Re: [SI-LIST] : Bonding options to short Busses on a die Pat Zabinski
- [SI-LIST] : Cross hatched planes fabrizio zanella
- Re: [SI-LIST] : Cross hatched planes Michael E Vrbanac
- RE: [SI-LIST] : Cross hatched planes Doyle, Greg
- RE: [SI-LIST] : Cross hatched planes =?Big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- [SI-LIST] : Trace Capacitance Farrokh Mottahedin
- RE: [SI-LIST] : Trace Capacitance Tim Morley
- Re: [SI-LIST] : Trace Capacitance Pat Zabinski
- [SI-LIST] : Request ... Douglas McKean
- [SI-LIST] : How to simulate the jitter of the part? Shubin Liu
- RE: [SI-LIST] : Cross hatched planes Syed Huq
- RE: [SI-LIST] : Cross hatched planes fabrizio zanella
- [SI-LIST] : SI Simulations Classification Abe Riazi
- [SI-LIST] : SCSI-LVDS Models Chan, Michael
- [SI-LIST] : Short Course Announcement Paul Franzon
- [SI-LIST] : Position Available at Sun Mike Fleice [CONTRACTOR]
- [SI-LIST] : Online Tools and Articles Christian S. Rode
- [SI-LIST] : Search for a screen capture tool CTTAI
- RE: [SI-LIST] : Search for a screen capture tool Dave Hoover
- RE: [SI-LIST] : Search for a screen capture tool Kowal, Keith
- Re: [SI-LIST] : Search for a screen capture tool Neven Pischl
- [SI-LIST] : Transmission line made from Parallel tracks on Flexible PCB CAI ZhongPing
- Re: [SI-LIST] : Transmission line made from Parallel tracks on Steve Weir
- Re: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Steve Weir
- Re: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Plane Georg Ramsch
- [SI-LIST] : Flexible and Passive PCI Backplane? Paul Levin
- RE: [SI-LIST] : Flexible and Passive PCI Backplane? Doug Piper
- RE: [SI-LIST] : Flexible and Passive PCI Backplane? Mackillop, William J.
- RE: [SI-LIST] : Flexible and Passive PCI Backplane? Denomme, Paul S.
- RE: [SI-LIST] : Flexible and Passive PCI Backplane? Ingraham, Andrew
- Re: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Plane Mike Jenkins
- RE: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Plane CAI ZhongPing
- AW: [SI-LIST] : Flexible and Passive PCI Backplane? Andreas Lenkisch
- Re: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Plane Aubrey Keith Sparkman
- Re: [SI-LIST] : Parallel tracks on Flexible PCB without GroundPlane Ron Miller
- RE: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Pl Grasso, Charles
- Re: [SI-LIST] : Parallel tracks on Flexible PCB without Ground Plane Adam
- Re[2]: [SI-LIST] : Parallel tracks on Flexible PCB without G [email protected]
- [SI-LIST] : Gigabit testing standards and methods wanted Shubin Liu
- RE: [SI-LIST] : Gigabit testing standards and methods wanted Zemin Liu
- [SI-LIST] : Signal measurement brain teaser Doug Smith
- Re: [SI-LIST] : Search for a screen capture tool Doug Smith
- [SI-LIST] : Question about Multiple PWBA Ground Spencer, David H
- RE: [SI-LIST] : Question about Multiple PWBA Ground Moore, Chan
- [SI-LIST] : Question about Multiple PWBA Ground Spencer, David H
- [SI-LIST] : SPICE Training Khalid Ansari
- RE: [SI-LIST] : Question about Multiple PWBA Ground Dave Hoover
- [SI-LIST] : Cross hatched ground planes [email protected]
- [SI-LIST] : Edge Rates Ken Patterson
- Re: [SI-LIST] : Edge Rates Steve Weir
- [SI-LIST] : RF Design Question Dave Hoover
- RE: [SI-LIST] : Edge Rates tomda
- RE: [SI-LIST] : Edge Rates Abe Riazi
- [SI-LIST] : Via Capacitances ... Douglas McKean
- Re: [SI-LIST] : Question about Multiple PWBA Ground Douglas McKean
- [SI-LIST] : "Best" way to ground board? Chris Bobek
- Re: [SI-LIST] : "Best" way to ground board? Steve Weir
- RE: [SI-LIST] : RF Design Question Kowal, Keith
- Re: [SI-LIST] : Edge Rates Dr. Edward P. Sayre
- [SI-LIST] : Speakers sought for Conference on EMC Compliance for Medical Devi Trauger, Tracy
- RE: [SI-LIST] : Edge Rates Peterson, James F
- RE: [SI-LIST] : Edge Rates Farrokh Mottahedin
- Re: [SI-LIST] : Via Capacitances ... Mike Degerstrom
- Re: [SI-LIST] : Via Capacitances ... Dr. Edward P. Sayre
- Re: [SI-LIST] : Speakers sought for Conference on EMC Compliance [email protected]
- Re: [SI-LIST] : Via Capacitances ... Douglas McKean
- [SI-LIST] : LVDS to Differential LVPECL conversion? John Lipsius
- [SI-LIST] : SI job position open at Stratus in Maynard, MA ==> else delete Mango, Steve
- Re[2]: [SI-LIST] : Via Capacitances ... [email protected]
- Re: Re[2]: [SI-LIST] : Via Capacitances ... Douglas McKean
- [SI-LIST] : Opportunity at Dell [email protected]
- [SI-LIST] : Some Semiconductors are Unnecessarily Fast Roy Leventhal
- Re: [SI-LIST] : Some Semiconductors are Unnecessarily Fast Mike Degerstrom
- Re: [SI-LIST] : Via Capacitances ... Gregg Fokken
- RE: [SI-LIST] : Via Capacitances ... Dave Hoover
- RE: [SI-LIST] : Opportunity at Dell - Austin, TX [email protected]
- RE: [SI-LIST] : Via Capacitances ... Denomme, Paul S.
- RE: [SI-LIST] : Via Capacitances ... [email protected]
- RE: [SI-LIST] : Speakers sought for Conference on EMC Compliance Trauger, Tracy
- RE: [SI-LIST] : Via Capacitances ... Dave Hoover
- RE: [SI-LIST] : Some Semiconductors are Unnecessarily Fast Ingraham, Andrew
- [SI-LIST] : Fast Semiconductors Hans Mellberg
- Re: [SI-LIST] : Fast Semiconductors Neven Pischl
- RE: [SI-LIST] : Some Semiconductors are Unnecessarily Fast Jon Keeble
- [SI-LIST] : GND on the outer layers Jon Keeble
- Re: [SI-LIST] : GND on the outer layers Steve Weir
- RE: [SI-LIST] : Via Capacitances ... Ingraham, Andrew
- [SI-LIST] : EMC on large distributed systems Georg Ramsch
- [SI-LIST] : edge-rates and vias Jan Vercammen
- [SI-LIST] : Which signal integrity tool to use Jostein Pettersen
- RE: [SI-LIST] : GND on the outer layers Chris Rokusek
- RE: [SI-LIST] : Which signal integrity tool to use Chan, Michael
- [SI-LIST] : Some Semiconductors are Unnecessarily Fast Poulet P.
- RE: [SI-LIST] : Via Capacitances ... Larry Smith
- Re: [SI-LIST] : GND on the outer layers Douglas McKean
- [SI-LIST] : Which signal integrity tool to use [email protected]
- Re: [SI-LIST] : EMC on large distributed systems Douglas McKean
- [SI-LIST] : METASTABILITY IN FLIP FLOPS Shayle Hirschman
- Re: [SI-LIST] : Some Semiconductors are Unnecessarily Fast Mike Degerstrom
- Re: [SI-LIST] : GND on the outer layers Douglas McKean
- Re: [SI-LIST] : Some Semiconductors are Unnecessarily Fast Steve Weir
- [SI-LIST] : respons to semiconductor I/O edge rates Jan Vercammen
- [SI-LIST] : even-odd mode influence Weber Chuang
- Re: [SI-LIST] : Some Semiconductors are Unnecessarily Fast Mike Degerstrom
- [SI-LIST] : Edge rates [email protected]
- FW: [SI-LIST] : METASTABILITY IN FLIP FLOPS Johnson, David
- RE: [SI-LIST] : Edge rates tomda
- Re: [SI-LIST] : even-odd mode influence Douglas McKean
- [Fwd: [SI-LIST] : EMC on large distributed systems] Adrian Shiner
- Re: FW: [SI-LIST] : METASTABILITY IN FLIP FLOPS Jake Salmi
- RE: [SI-LIST] : response to semiconductor I/O edge rates Muranyi, Arpad
- FW: FW: [SI-LIST] : METASTABILITY IN FLIP FLOPS Johnson, David
- [SI-LIST] : simlifying Spice models Ron Miller
- RE: [SI-LIST] : response to semiconductor I/O edge rates Roy Leventhal
- Re: FW: [SI-LIST] : METASTABILITY IN FLIP FLOPS Steve Weir
- [SI-LIST] : even-odd mode influence [email protected]
- [SI-LIST] : Trusting tools. Laurence Michaels
- RE: [SI-LIST] : predriver control schemes (was Some Semiconductor West, Todd
- RE: [SI-LIST] : response to semiconductor I/O edge rates tomda
- Re: [SI-LIST] : response to semiconductor I/O edge rates Dennis Tomlinson
- Re: [SI-LIST] : response to semiconductor I/O edge rates Dennis Tomlinson
- RE: [SI-LIST] : even-odd mode influence WAUGH,RAY
- RE: [SI-LIST] : response to semiconductor I/O edge rates Muranyi, Arpad
- Re: [SI-LIST] : even-odd mode influence Douglas McKean
- RE: [SI-LIST] : even-odd mode influence Weber Chuang
- [SI-LIST] : references on leadframe and package pin materials and signal degradation Jan Vercammen
- RE: [SI-LIST] : Edge rates fabrizio zanella
- RE: [SI-LIST] : response to semiconductor I/O edge rates Roy Leventhal
- RE: [SI-LIST] : response to semiconductor I/O edge rates Roy Leventhal
- RE: [SI-LIST] : Edge rates Roy Leventhal
- RE: [SI-LIST] : even-odd mode influence John Williamson
- Re: [SI-LIST] : response to semiconductor I/O edge rates Roy Leventhal
- Re: [SI-LIST] : response to semiconductor I/O edge rates D. C. Sessions
- Re: [SI-LIST] : response to semiconductor I/O edge rates D. C. Sessions
- Re: [SI-LIST] : METASTABILITY IN FLIP FLOPS Howard Johnson
- RE: [SI-LIST] : GND on the outer layers Dawson Yee
- Re: [SI-LIST] : response to semiconductor I/O edge rates Roy Leventhal
- RE: [SI-LIST] : response to semiconductor I/O edge rates Chris Rokusek
- IBIS war stories Re: [SI-LIST] : response to semiconductor I/O edge Laurence Michaels
- RE: [SI-LIST] : response to semiconductor I/O edge rates Chan, Michael
- RE: [SI-LIST] : response to semiconductor I/O edge rates fabrizio zanella
- Re: [SI-LIST] : response to semiconductor I/O edge rates Scott McMorrow
- Re: [SI-LIST] : response to semiconductor I/O edge rates D. C. Sessions
- RE: [SI-LIST] : response to semiconductor I/O edge rates tomda
- Re: IBIS war stories Re: [SI-LIST] : response to semiconductor I/O edge Scott McMorrow
- Re: [SI-LIST] : response to semiconductor I/O edge rates [email protected]
- RE: [SI-LIST] : response to semiconductor I/O edge rates Haller, Robert
- RE: [SI-LIST] : even-odd mode influence Douglas McKean
- RE: [SI-LIST] : even-odd mode influence Douglas McKean
- Re: IBIS war stories Re: [SI-LIST] : response to semiconductor I/O edge Mitch Morey
- Re: IBIS war stories Re: [SI-LIST] : response to semiconductor I Roy Leventhal
- Re: [SI-LIST] : response to semiconductor I/O edge rates Scott McMorrow
- RE: [SI-LIST] : response to semiconductor I/O edge rates Chris Rokusek
- Re: [SI-LIST] : response to semiconductor I/O edge rates Roy Leventhal
- Re: [SI-LIST] : response to semiconductor I/O edge rates D. C. Sessions
- [SI-LIST] : GHz Op Amps Larry McMillan
- RE: [SI-LIST] : response to semiconductor I/O edge rates Abe Riazi
- [SI-LIST] : How to treat the ASIC package pin-assigns chenlanbing
- [SI-LIST] : BGA pin location Takashi Yanagimoto
- [SI-LIST] : SDRAM bypassing Ken Patterson
- Re: [SI-LIST] : even-odd mode influence Mike Degerstrom
- [SI-LIST] : LVTTL Drivers vs. LS Chris Bobek
- RE: [SI-LIST] : How to treat the ASIC package pin-assigns [email protected]
- Re: [SI-LIST] : Edge rates Mike Degerstrom
- RE: [SI-LIST] : even-odd mode influence WAUGH,RAY
- RE: [SI-LIST] : even-odd mode influence WAUGH,RAY
- RE: [SI-LIST] : LVTTL Drivers vs. LS Ammar, Ramzi
- Re: [SI-LIST] : response to semiconductor I/O edge rates David Haedge
- [SI-LIST] : Eye diagram displays from HSPICE simulations [email protected]
- [SI-LIST] : Output Buffer Need BYERS ANDREW CLARK
- RE: [SI-LIST] : BGA pin location Ingraham, Andrew
- Re: [SI-LIST] : Edge rates Mike Degerstrom
- RE: [SI-LIST] : Eye diagram displays from HSPICE simulations Mellitz, Richard
- Re: [SI-LIST] : Output Buffer Need S. Weir
- Re: [SI-LIST] : SDRAM bypassing S. Weir
- RE: [SI-LIST] : even-odd mode influence WAUGH,RAY
- [SI-LIST] : eye diagram demo from Avanti Scott McMorrow
- RE: [SI-LIST] : even-odd mode influence [email protected]
- [SI-LIST] : Routing Criteria Lum Wee Mei
- Re: [SI-LIST] : Routing Criteria Steve Weir
- [SI-LIST] : PCB losses Mike Degerstrom
- [SI-LIST] : EMI consultant? Gary Sanders
- Re: [SI-LIST] : even-odd mode influence Alok Tripathi
- [SI-LIST] : Best type of models, edge rates & load Mark Nass
- [SI-LIST] : Call for presentations, 3-D packaging advanced technology worksho Lyke James Civ AFRL/VSSE
- RE: [SI-LIST] : Call for presentations, 3-D packaging advanced te Heyfitch, Vadim
- [SI-LIST] : Job Opportunity at Amkor Technology Nozad Karim
- [SI-LIST] : High frequency decoupling Capacitors Ritesh Kapahi
- [SI-LIST] : mail list subject Paulo Abreu
- RE: [SI-LIST] : Best type of models, edge rates & load Mellitz, Richard
- RE: [SI-LIST] : High frequency decoupling Capacitors BILL ANTHONY
- Re: [SI-LIST] : w element Scott McMorrow
- R:[SI-LIST] : High frequency decoupling Capacitors Rossi Giuseppe
- RE: [SI-LIST] : Best type of models, edge rates & load Peterson, James F
- [SI-LIST] : W Element Models Jim Foppiano
- Re: [SI-LIST] : Call for presentations, 3-D packaging advanced technology workshop Gregg Fokken
- RE: [SI-LIST] : IBIS MODELS Somayaji, Anu
- Re: [SI-LIST] : w element Mike Degerstrom
- RE: [SI-LIST] : Best type of models, edge rates & load Beal, Weston
- [SI-LIST] : IBIS models for oscillators - ?? Kowal, Keith
- RE: [SI-LIST] : Best type of models, edge rates & load Beal, Weston
- RE: [SI-LIST] : Best type of models, edge rates & load Mark Nass
- [SI-LIST] : Best type of models, edge rates & load [email protected]
- Re: [SI-LIST] : IBIS MODELS Ritesh Kapahi
- [SI-LIST] : OVERSHOOT/MAX. VOLTAGE RATING JOACHIM MUELLER
- RE: [SI-LIST] : mail list subject Chan, Michael
- [SI-LIST] : Which witch Fred Dieckmann
- RE: [SI-LIST] : OVERSHOOT/MAX. VOLTAGE RATING [email protected]
- Re: [SI-LIST] : Best type of models, edge rates & load Todd Westerhoff
- [SI-LIST] : Position Opening. Sr. Applications Engineer. LSI Logic. Vipul Badoni
- RE: [SI-LIST] : Best type of models, edge rates & load Haller, Robert
- RE: [SI-LIST] : OVERSHOOT/MAX. VOLTAGE RATING Ingraham, Andrew
- [SI-LIST] : Microstrip losses WAUGH,RAY
- [SI-LIST] : PCB losses WAUGH,RAY
- RE: [SI-LIST] : Best type of models, edge rates & load Mark Nass
- RE: [SI-LIST] : Best type of models, edge rates & load Abe Riazi
- RE: [SI-LIST] : OVERSHOOT/MAX. VOLTAGE RATING Ingraham, Andrew
- [SI-LIST] : Magnetic Field Immunity Adrian Shiner
- [SI-LIST] : SI Engineer Opportunity at Huawei - Shenzhen, China chenlanbing
- [SI-LIST] : IMAPS Presentation on Simulating Fibre Channel Loss [email protected]
- Re: [SI-LIST] : Position Opening. Sr. Applications Engineer. Richard Gaunt
- RE: [SI-LIST] : Best type of models, edge rates & load Roy Leventhal
- [SI-LIST] : HSTL Dan Bostan
- [SI-LIST] : Rambus vs. di/dt SSN =?Big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- Re: [SI-LIST] : Rambus vs. di/dt SSN S. Weir
- [SI-LIST] : looking for signal integrity engineer position johnX smith
- RE: [SI-LIST] : looking for signal integrity engineer position Chen, Qing-Lun
- [SI-LIST] : Buffer Delay Vs Timing_location parameter in IBIS Lalit B. Shinde
- [SI-LIST] : Modification of decoupling-caps [email protected]
- [SI-LIST] : Job Opening -- IBM Corporation, Poughkeepsie NY [email protected]
- RE: [SI-LIST] : looking for signal integrity engineer position Mackillop, William J.
- RE: [SI-LIST] : Best type of models, edge rates & load tomda
- RE: [SI-LIST] : Best type of models, edge rates & load tomda
- RE: [SI-LIST] : Modification of decoupling-caps tomda
- Re: [SI-LIST] : Microstrip losses Dr. Edward P. Sayre
- [SI-LIST] : si-list posting etiquette Ray Anderson
- [SI-LIST] : Noise Voltage levels vs. EMI levels Spencer, David H
- [SI-LIST] : dielectric losses vs skin effect losses [email protected]
- [SI-LIST] : Job Opening Ron Miller
- RE: [SI-LIST] : Best type of models, edge rates & load Roy Leventhal
- [SI-LIST] : Job Opening Doug Piper
- RE: [SI-LIST] : Best type of models, edge rates & load tomda
- RE: [SI-LIST] : Best type of models, edge rates & load Roy Leventhal
- Re: [SI-LIST] : Noise Voltage levels vs. EMI levels S. Weir
- [SI-LIST] : Recommend a CMOS/bipolar circuit design book? Eric Goodill
- RE: [SI-LIST] : Noise Voltage levels vs. EMI levels Grasso, Charles
- Re: [SI-LIST] : IMAPS Presentation on Simulating Fibre Channel Loss Tarek Ali - WGS Board Design Technology
- RE: [SI-LIST] : Noise Voltage levels vs. EMI levels Larry Smith
- RE: [SI-LIST] : Noise Voltage levels vs. EMI levels Larry Smith
- RE: [SI-LIST] : OVERSHOOT/MAX. VOLTAGE RATING [email protected]
- RE: [SI-LIST] : Noise Voltage levels vs. EMI levels Chris Rokusek
- [SI-LIST] : 1 GHz probe plans posted [email protected]
- [SI-LIST] : Clue-by-four (was OVERSHOOT ... RATING) D. C. Sessions
- Re: [SI-LIST] : Noise Voltage levels vs. EMI levels Douglas McKean
- Re: [SI-LIST] : Accuracy of Hspice's W element Dmitri Kuznetsov
- RE: [SI-LIST] : 1 GHz probe plans posted Doug Piper
- RE: [SI-LIST] : Accuracy of Hspice's W element Mellitz, Richard
- Re: [SI-LIST] : Accuracy of Hspice's W element Doug Yanagawa
- Re: [SI-LIST] : Accuracy of Hspice's W element Ron Miller
- Re: [SI-LIST] : Accuracy of Hspice's W element Scott McMorrow
- [SI-LIST] : Job Openings at Intel in Santa Clara bgrossma
- [SI-LIST] : [SI-LIST] Positive ECL (PECL) voltage swings, but designed to be Salvador Aguinaga
- Re: [SI-LIST] : Accuracy of Hspice's W element Larry Smith
- RE: [SI-LIST] : Accuracy of Hspice's W element Drew Plant
- RE: [SI-LIST] : [SI-LIST] Positive ECL (PECL) voltage swings, but Farrokh Mottahedin
- Re: [SI-LIST] : Accuracy of Hspice's W element Dmitri Kuznetsov
- Re: [SI-LIST] : [SI-LIST] Positive ECL (PECL) voltage swings, but Jim Freeman
- Re: [SI-LIST] : [SI-LIST] Positive ECL (PECL) voltage swings, L D Miller
- [SI-LIST] : Re: (2) Positive ECL (PECL) voltage swings, but designed L D Miller
- RE: [SI-LIST] : [SI-LIST] Positive ECL (PECL) voltage swings, but Krull, Nick J
- [SI-LIST] : Waveform comparison metrics Levin, Alexander
- RE: [SI-LIST] : Re: (2) Positive ECL (PECL) voltage swings, but d Knighten, Jim L
- RE: [SI-LIST] : Waveform comparison metrics tomda
- RE: [SI-LIST] : Call for presentations, 3-D packaging advanced te Lyke James Civ AFRL/VSSE
- RE: [SI-LIST] : Re: (2) Positive ECL (PECL) voltage swings, L D Miller
- [SI-LIST] : HSTL voltage levels fabrizio zanella
- RE: [SI-LIST] : Waveform comparison metrics tomda
- RE: [SI-LIST] : Waveform comparison metrics [email protected]
- RE: [SI-LIST] : Waveform comparison metrics tomda
- RE: [SI-LIST] : Waveform comparison metrics Levin, Alexander
- [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Mellitz, Richard
- [SI-LIST] : coming up with average power estimates for buffers Pat Zabinski
- RE: [SI-LIST] : Waveform comparison metrics tomda
- Re: [SI-LIST] : coming up with average power estimates for L D Miller
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Ray Anderson
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Dmitri Kuznetsov
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Ray Anderson
- Re: [SI-LIST] : Waveform comparison metrics Pat Zabinski
- [SI-LIST] : Fibre Channel Fontanez, David
- RE: [SI-LIST] : coming up with average power estimates for buffer Ingraham, Andrew
- RE: [SI-LIST] : coming up with average power estimates for buffer Ingraham, Andrew
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Ray Anderson
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Scott McMorrow
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- [SI-LIST] : Resonant clocks (was:coming up with average power estimates D. C. Sessions
- Re: [SI-LIST] : coming up with average power estimates for S. Weir
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Chan, Michael
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Jiayuan Fang
- [SI-LIST] : Job Opening Chen, Qing-Lun
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Scott McMorrow
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Paul Levin
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- [SI-LIST] : Need Information on effect of 45 degree angles on high speed sign Denomme, Paul S.
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for Dr. Edward P. Sayre
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Chan, Michael
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Dan Bostan
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Larry Smith
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem ents Ray Anderson
- [SI-LIST] : IBIS Models for Micron 1Mb Syncburst SRAM Ken Patterson
- Re: [SI-LIST] : Need Information on effect of 45 degree angles on high speed signals. Ritesh Kapahi
- RE: [SI-LIST] : coming up with average power estimates for buffers tomda
- [SI-LIST] : Seeking Position [email protected]
- [SI-LIST] : ESD Gun Manickavelu
- [SI-LIST] : your request Juergen Kuehnel
- RE: [SI-LIST] : Resonant clocks (was:coming up with average power Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Michael Tsuk
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Michael Tsuk
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Michael Tsuk
- RE: [SI-LIST] : HSTL voltage levels Hansel Collins
- RE: [SI-LIST] : coming up with average power estimates for buffers Hansel Collins
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Heyfitch, Vadim
- Re: [SI-LIST] : coming up with average power estimates for Steve Weir
- Re: [SI-LIST] : Need Information on effect of 45 degree angles on high Georg Ramsch
- AW: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem John, Hans-Joerg
- Re: [SI-LIST] : Need Information on effect of 45 degree angles on high Lum Wee Mei
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Christopher Albert
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Dave Hoover
- RE: [SI-LIST] : W-Elements Haller, Robert
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for Michael Chan
- [SI-LIST] : Final CFP for ISQED 2000 Donald Goddard
- [SI-LIST] : Subject: paper on Copper roughness Amit Agrawal
- [SI-LIST] : RESULTS to Proposal: Rs correlation/collaboration for W-Elements Mellitz, Richard
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem ents Raghu
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem ents Ray Anderson
- [SI-LIST] : RE: RESULTS to Proposal: Rs correlation/collaboration for W-Eleme Mellitz, Richard
- [SI-LIST] : Seeking SI models for memory DIMMs. Kim Helliwell
- RE: [SI-LIST] : RE: RESULTS to Proposal: Rs correlation/collabora Chan, Michael
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem ents Dmitri Kuznetsov
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem ents Dmitri Kuznetsov
- Re: [SI-LIST] : Seeking SI models for memory DIMMs. Todd Westerhoff
- Re: [SI-LIST] : RE: RESULTS to Proposal: Rs correlation/collaboration Laurence Michaels
- Re: [SI-LIST] : RE: RESULTS to Proposal: Rs correlation/collaboration Laurence Michaels
- RE: [SI-LIST] : Seeking SI models for memory DIMMs. Beal, Weston
- RE: [SI-LIST] : RE: RESULTS to Proposal: Rs correlation/collaboration for W-Elements Craig Callen
- [SI-LIST] : Job Posting - Mayo Foundation in Minnesota Pat Zabinski
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Ray Anderson
- [SI-LIST] : Job posting: Ansoft Corporation J. Eric Bracken
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Beomtaek Lee
- [SI-LIST] : RESULTS(8/6/99) to Proposal: Rs correlation/collabora Mellitz, Richard
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for Dr. Edward P. Sayre
- Re: [SI-LIST] : RESULTS(8/6/99) to Proposal: Rs Mike Ventham
- [SI-LIST] : Traces Over Plane Clearances Dave Hoover
- [SI-LIST] : Resistivity of IC routing [email protected]
- RE: [SI-LIST] : Resistivity of IC routing Lynne Green
- RE: [SI-LIST] : Resistivity of IC routing Ron Gutmann
- Re: [SI-LIST] : Traces Over Plane Clearances Chuck Hill
- RE: [SI-LIST] : Resistivity of IC routing Christophe Bianchi
- RE: [SI-LIST] : Resistivity of IC routing Christophe Bianchi
- RE: [SI-LIST] : Traces Over Plane Clearances Dave Hoover
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem Lee, Beomtaek
- [SI-LIST] : differential pair routing Mario Appiani
- Re: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elements Jim Freeman
- Re: [SI-LIST] : differential pair routing Steve Weir
- [SI-LIST] : RF & Digital Lum Wee Mei
- RE: [SI-LIST] : RF & Digital Liang, Hongbo
- RE: [SI-LIST] : RF & Digital THOMPSON, Martin
- [SI-LIST] : Periphery Stitching ... Douglas McKean
- RE: [SI-LIST] : RF & Digital [email protected]
- Re: [SI-LIST] : RF & Digital S. Weir
- [SI-LIST] : RF & Digital Jan Vercammen
- [SI-LIST] : search for handbook Jan Vercammen
- [SI-LIST] : IBIS SUMMIT - October 14, 1999 - Kathy Breda
- [SI-LIST] : Job posting: Motorola Jason Miller
- RE: [SI-LIST] : differential pair routing Knighten, Jim L
- RE: [SI-LIST] : differential pair routing Heyfitch, Vadim
- [SI-LIST] : Stackup Extraction Abe Riazi
- [SI-LIST] : split plane impact simulation Weber Chuang
- Re: [SI-LIST] : Stackup Extraction Pat Zabinski
- RE: [SI-LIST] : Stackup Extraction Abe Riazi
- [SI-LIST] : Clarification on the current issues on Hspice W-element Kyung Suk
- Re: [SI-LIST] : Stackup Extraction Todd Westerhoff
- RE: [SI-LIST] : Stackup Extraction Abe Riazi
- [SI-LIST] : Updated differential article Christian S. Rode
- RE: [SI-LIST] : Stackup Extraction Mike Mayer
- RE: [SI-LIST] : Stackup Extraction Michael C. Greim
- [SI-LIST] : Idsat variation Mike Degerstrom
- [SI-LIST] : revised 1GHz probe plans Douglas C. Smith
- [SI-LIST] : About the AC analysis with HSPICE Rachild Chen
- [SI-LIST] : About the AC analysis with HSPICE Rachild Chen
- RE: [SI-LIST] : revised 1GHz probe plans Mellitz, Richard
- [SI-LIST] : Estimating DIMM Power Consumption Chris Heard
- Re: [SI-LIST] : Idsat variation Mike Degerstrom
- Re: [SI-LIST] : About the AC analysis with HSPICE Mike Degerstrom
- [SI-LIST] : Schematic entry for HSPICE Michael Gutzmann
- Re: [SI-LIST] : Schematic entry for HSPICE Pat Zabinski
- Re: [SI-LIST] : Idsat variation Mike Degerstrom
- Re: [SI-LIST] : Idsat variation Mike Degerstrom
- [SI-LIST] : Search ? IBIS to HSPICE Tool... Ku Ja Yong
- RE: [SI-LIST] : Search ? IBIS to HSPICE Tool... Shah, Nilesh N
- RE: [SI-LIST] : Search ? IBIS to HSPICE Tool... Shah, Nilesh N
- [SI-LIST] : EMC&FCC issues Oleg Kipnis
- [SI-LIST] : Search ? IBIS to HSPICE Tool... Scott King
- RE: [SI-LIST] : Search ? IBIS to HSPICE Tool... Muranyi, Arpad
- RE: [SI-LIST] : Search ? IBIS to HSPICE Tool... Muranyi, Arpad
- [SI-LIST] : Director, Package Characterization Nozad Karim
- RE: [SI-LIST] : Search ? IBIS to HSPICE Tool... C. Kumar
- [SI-LIST] : BTE models Dan Bostan
- [SI-LIST] : IBIS models Mike Mayer
- [SI-LIST] : MG Interconnectix nsi04133-timmer
- RE: [SI-LIST] : MG Interconnectix Beal, Weston
- [SI-LIST] : Slotted ground planes Russell Rapport
- [SI-LIST] : PCB impedance variation v.s. layout pattern Allen Wang
- [SI-LIST] : FR-4 and PCB Tolerances Dave Hoover
- RE: [SI-LIST] : Stackup Extraction apanella
- [SI-LIST] : Final CFP for ISQED 2000 Donald Goddard
- RE: ASIC libraries Re: [SI-LIST] : IBIS models Muranyi, Arpad
- Re: ASIC libraries Re: [SI-LIST] : IBIS models D. C. Sessions
- RE: [SI-LIST] : PCB impedance variation v.s. layout pattern Mellitz, Richard
- [SI-LIST] : Slotted ground planes Russell Rapport
- [SI-LIST] : Power Distribution along a connector Chris Bobek
- [SI-LIST] : I/O technologies and live insertion Monserrate, Angel
- RE: [SI-LIST] : Slotted ground planes Mellitz, Richard
- Re: [SI-LIST] : PCB impedance variation v.s. layout pattern Doug Brooks
- Re: [SI-LIST] : PCB impedance variation v.s. layout pattern Chris Padilla
- Re: [SI-LIST] : PCB impedance variation v.s. layout pattern Douglas McKean
- RE: [SI-LIST] : PCB impedance variation v.s. layout pattern Grasso, Charles
- RE: [SI-LIST] : IBIS models Abe Riazi
- Re: [SI-LIST] : PCB impedance variation v.s. layout pattern Doug McKean
- Re: [SI-LIST] : PCB impedance variation v.s. layout pattern S. Weir
- RE: [SI-LIST] : FR-4 and PCB Tolerances Abe Riazi
- RE: [SI-LIST] : IBIS models Roy Leventhal
- RE: [SI-LIST] : PCB impedance variation v.s. layout pattern Ingraham, Andrew
- RE: [SI-LIST] : MG Interconnectix [email protected]
- RE: [SI-LIST] : Slotted ground planes [email protected]
- RE: [SI-LIST] : FR-4 and PCB Tolerances Dave Hoover
- RE: [SI-LIST] : FR-4 and PCB Tolerances Dave Hoover
- RE: [SI-LIST] : IBIS models Michael C. Greim
- RE: [SI-LIST] : FR-4 and PCB Tolerances Dave Hoover
- RE: [SI-LIST] : PCB impedance variation v.s. layout pattern Ingraham, Andrew
- [SI-LIST] : Different IBIS question Doug Brooks
- RE: [SI-LIST] : PCB impedance variation v.s. layout pattern Douglas McKean
- RE: [SI-LIST] : Different IBIS question tomda
- RE: [SI-LIST] : IBIS models Abe Riazi
- RE: [SI-LIST] : Different IBIS question Ingraham, Andrew
- RE: [SI-LIST] : Power Distribution along a connector Ingraham, Andrew
- [SI-LIST] : IBIS models, how to fill in the missing pin info and other. Krull, Nick J
- [SI-LIST] : IBIS models, how to fill in the missing pin info and other. [email protected]
- [SI-LIST] : BGA socket modeling Matt
- RE: [SI-LIST] : Double Messages....? Knighten, Jim L
- [SI-LIST] : IBIS Model Libraries [email protected]
- [SI-LIST] : QUAD XTK vs. Rambus Simulation =?Big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- [SI-LIST] : Re: Tektronix IPA-510 question Dima Smolyansky
- Re: [SI-LIST] : BGA socket modeling Pat Zabinski
- RE: [SI-LIST] : BGA socket modeling Mellitz, Richard
- RE: [SI-LIST] : IBIS Model Libraries Beal, Weston
- [SI-LIST] : Automatic/Semi-automatic design check of PCB layout database for Ron Miller
- [SI-LIST] : "Picket Fence" (Via Fence) for increasing isolation Elya B. Joffe
- Re: [SI-LIST] : Serpentine traces Howard Johnson
- Re: [SI-LIST] : PCB design techniques for EMC control Roland F. Portman
- Re: [SI-LIST] : Earth Ground Howard Johnson
- Re: [SI-LIST] : Earth Ground Howard Johnson
- Re: [SI-LIST] : Differential pairs and place splits Vinu Arumugham
- Re: [SI-LIST] : Down-bond in chip packaging Yehuda D. Yizraeli
- [SI-LIST] : Paper on IBIS simulation algorithm Raymond Chen
- Re: Subject: [SI-LIST] : Power Distribution along a connector Jon Keeble
- RE: [SI-LIST] : BGA socket modeling Tan, Tat Hin
- RE: [SI-LIST] : "Picket Fence" (Via Fence) for increasing isolati Grasso, Charles
- [SI-LIST] : Tektronix IPA-510 question Eric B. Lewis
- RE: [SI-LIST] : "Picket Fence" (Via Fence) for increasing isolati Knighten, Jim L
- [SI-LIST] : RE: Paper on IBIS simulation algorithm Richard A. Schumacher
- RE: [SI-LIST] : Automatic/Semi-automatic design check of PCB layo Knighten, Jim L
- RE: [SI-LIST] : Serpentine traces Chan, Michael
- [SI-LIST] : EPEP '99 Final Program Madhavan Swaminathan
- Re: [SI-LIST] : "Picket Fence" (Via Fence) for increasing Ron Miller
- RE: [SI-LIST] : MG Interconnectix Peterson, James F
- Re: [SI-LIST] : Differential pairs and place splits Mike Jenkins
- Re: [SI-LIST] : PCB design techniques for EMC control Ron Matthews
- RE: [SI-LIST] : Trace impedance measurement for dual stripline John Lin - TAO
- Re: [SI-LIST] : Automatic/Semi-automatic design check of PCB layout database for crosstalk/SI viol Fred Balistreri
- Re: [SI-LIST] : Down-bond in chip packaging D.C. Sessions
- [SI-LIST] : RE: Paper on IBIS simulation algorithm Raymond Chen
- Re: [SI-LIST] : Modeling Package parasitics D.C. Sessions
- RE: [SI-LIST] : Automatic/Semi-automatic design check of PCB layo Harris, George
- RE: [SI-LIST] : Serpentine traces Mellitz, Richard
- Re: [SI-LIST] : "Picket Fence" (Via Fence) for increasing Ron Miller
- [SI-LIST] : "Reply To:" Survey Results Ray Anderson
- Re: [SI-LIST] : Automatic/Semi-automatic design check of PCB layout database for crosstalk/SI violat Kim Helliwell
- [SI-LIST] : Job Opening Mike Fleice [CONTRACTOR]
- Re: [SI-LIST] : Automatic/Semi-automatic design check of PCB Gwen Merchant
- RE: [SI-LIST] : Automatic/Semi-automatic design check of PCB layo Marc Humphreys
- [SI-LIST] : Error in my timing-101 presentation Todd Westerhoff
- Re: [SI-LIST] : PCB design techniques for EMC control Fred Dieckmann
- [SI-LIST] : Macro modeling of Buffer xingjian cai
- [SI-LIST] : [SI-LIST]:Drivers to minimize reflections Bobby Hubertus
- Re: [SI-LIST] : [SI-LIST]:Drivers to minimize reflections Scott McMorrow
- [SI-LIST] : Anyone doing SI simulations for Pentium II boards? Kim Helliwell
- Re: [SI-LIST] : Automatic/Semi-automatic design check of PCB Todd Westerhoff
- [SI-LIST] : voltage measurements using a current probe Douglas C. Smith
- Re: [SI-LIST] : [SI-LIST]:Drivers to minimize reflections sweir
- [SI-LIST] : Estimating the Inrush current [email protected]
- Re: [SI-LIST] : voltage measurements using a current probe Pat Zabinski
- [SI-LIST] : Measuring noise with Differntial probe Tadashi ARAI
- [SI-LIST] : Anyone doing SI simulations for Pentium II boards? [email protected]
- RE: [SI-LIST] : Measuring noise with Differntial probe Ingraham, Andrew
- RE: [SI-LIST] : Measuring noise with Differntial probe Grasso, Charles
- RE: [SI-LIST] : "Picket Fence" (Via Fence) for increasing isolati Barnes, Larry
- RE: [SI-LIST] : voltage measurements using a current probe Ingraham, Andrew
- RE: [SI-LIST] : Measuring noise with Differntial probe Howard Ji
- Re: [SI-LIST] : Anyone doing SI simulations for Pentium II Todd Westerhoff
- Re: [SI-LIST] : Anyone doing SI simulations for Pentium IIboards? Scott McMorrow
- Re: [SI-LIST] : Anyone doing SI simulations for Pentium Todd Westerhoff
- Re: [SI-LIST] : Anyone doing SI simulations for Pentium Shahar Bar
- RE: [SI-LIST] : Anyone doing SI simulations for Pentium II [email protected]
- Re: [SI-LIST] : Modeling Package parasitics Chuck Hill
- [SI-LIST] : backside metal Matt Kaufmann
- [SI-LIST] : Modeling Package parasitics (measurements) Chuck Hill
- [SI-LIST] : RE: SCSI IBIS models John Spohnheimer
- [SI-LIST] : RE: SCSI IBIS models John Spohnheimer
- Re: [SI-LIST] : Modeling Package parasitics [email protected]
- [SI-LIST] : Looking for Intel 82440GX chipset IBIS model Ku Ja Yong
- Re: [SI-LIST] : Estimating the Inrush current Patrick Lawler
- [SI-LIST] : Trace Impedance vs Supply Noise Robert Lindsell
- Re: [SI-LIST] : backside metal Erik Daniel
- [SI-LIST] : 2.5 Gb/s for Gigabit Ethernet with Vitesse VSC7146 Greim, Michael
- [SI-LIST] : Positions available Irfan Elahi
- [SI-LIST] : Decoupling strategy in tight spaces Chris Bobek
- RE: [SI-LIST] : Decoupling strategy in tight spaces Greim, Michael
- [SI-LIST] : RE: Another decoupling question Volk, Andrew M
- Re: [SI-LIST] : Modeling Package parasitics Chuck Hill
- [SI-LIST] : HP-ADS Sainath Nimmagada
- [SI-LIST] : RE: Another decoupling question Greim, Michael
- [SI-LIST] : RE: Another decoupling question Greim, Michael
- [SI-LIST] : Any Veribest SI tool experiences? Laurence Michaels
- [SI-LIST] : RE: Another decoupling question Ingraham, Andrew
- RE: [SI-LIST] : RE: Another decoupling question Mellitz, Richard
- [SI-LIST] : Substrate Modeling Sainath Nimmagada
- [SI-LIST] : Non-technical question Joe Socha
- RE: [SI-LIST] : RE: Another decoupling question Hans Mellberg
- [SI-LIST] : SI=Positions Avail rbishop
- RE: [SI-LIST] : Decoupling strategy in tight spaces Greim, Michael
- [SI-LIST] : IEEE Paper Douglas C. Smith
- RE: [SI-LIST] : RE: Another decoupling question Dave Hoover
- RE: [SI-LIST] : RE: Another decoupling question Dr. Edward P. Sayre
- [SI-LIST] : Backside metal Tom Zimmerman
- RE: [SI-LIST] : RE: Another decoupling question Volk, Andrew M
- [SI-LIST] : EMC Training [email protected]
- [SI-LIST] : How to find a way to solute the double-side PCB design quality Rachild Chen
- Re: [SI-LIST] : EMC Training S. Weir
- [SI-LIST] : Current probe EMC paper posted (finally) Douglas C. Smith
- [SI-LIST] : Magnetic field probe paper posted Douglas C. Smith
- [SI-LIST] : Moment Method/Ensemble/Touchstone/Errors C Deibele
- Re: [SI-LIST] : RE: Another decoupling question D. C. Sessions
- Re: [SI-LIST] : RE: Another decoupling question D. C. Sessions
- [SI-LIST] : High signal density controlled impedance connectors Greim, Michael
- RE: [SI-LIST] : RE: Another decoupling question Knighten, Jim L
- Re: [SI-LIST] : RE: Another decoupling question Mike Degerstrom
- Re: [SI-LIST] : RE: Another decoupling question D. C. Sessions
- Re: [SI-LIST] : RE: Another decoupling question D. C. Sessions
- RE: [SI-LIST] : High signal density controlled impedance connecto Bermensolo, Todd L
- [SI-LIST] : Different oz copper for grounds Chris Bobek
- [SI-LIST] : Position available Paul Galloway
- RE: [SI-LIST] : High signal density controlled impedance connecto Greim, Michael
- [SI-LIST] : question about VGA signals Mango, Steve
- Re: [SI-LIST] : Different oz copper for grounds Pat Zabinski
- [SI-LIST] : Q: Plane-jumping return currents Eric Goodill
- [SI-LIST] : Gentle Reminder Time Again Ray Anderson
- Re: [SI-LIST] : RE: Another decoupling question D. C. Sessions
- [SI-LIST] : 8b/10b D. C. Sessions
- Re: [SI-LIST] : Q: Plane-jumping return currents Mike Jenkins
- RE: [SI-LIST] : How to find a way to solute the double-side PCB d Ingraham, Andrew
- Re: [SI-LIST] : Q: Plane-jumping return currents Christian Schuster
- Re: [SI-LIST] : Q: Plane-jumping return currents Christian Schuster
- [SI-LIST] : Non-standard bus termination (2nd posting) [email protected]
- Re: [SI-LIST] : Non-standard bus termination (2nd posting) sweir
- Re: [SI-LIST] : Q: Plane-jumping return currents Jan Vercammen
- RE: [SI-LIST] : Non-standard bus termination (2nd posting) Patterson, Ken
- RE: [SI-LIST] : 8b/10b Mellitz, Richard
- RE: [SI-LIST] : Non-standard bus termination (2nd posting) Kassem Abdallah
- Re: [SI-LIST] : Q: Plane-jumping return currents Larry Smith
- RE: [SI-LIST] : Non-standard bus termination (2nd posting) Greim, Michael
- Re: [SI-LIST] : Q: Plane-jumping return currents Larry Smith
- RE: [SI-LIST] : Non-standard bus termination (2nd posting) Ingraham, Andrew
- [SI-LIST] : IBIS Model for Hitachi 64M SDRAM Patterson, Ken
- [SI-LIST] : Simulating Meander Delay Lines Roy Leventhal
- Re: [SI-LIST] : Q: Plane-jumping return currents Larry Smith
- [SI-LIST] : Routing signals between ground and carved-up power plane Neil Weinstock
- Re: [SI-LIST] : Q: Plane-jumping return currents Eric Goodill
- Re: [SI-LIST] : Q: Plane-jumping return currents D. C. Sessions
- Re: [SI-LIST] : Q: Plane-jumping return currents Douglas C. Smith
- Re: [SI-LIST] : Q: Plane-jumping return currents Douglas C. Smith
- RE: [SI-LIST] : Non-standard bus termination (2nd posting) [email protected]
- [SI-LIST] : About the AC signals SI analyse Rachild Chen
- Re: [SI-LIST] : Non-standard bus termination (2nd posting) sweir
- [SI-LIST] : LVDS-to-PECL and vice versa Lyke James Civ AFRL/VSSE
- RE: [SI-LIST] : LVDS-to-PECL and vice versa Kowal, Keith
- RE: [SI-LIST] : LVDS-to-PECL and vice versa Greim, Michael
- [SI-LIST] : LVDS-to-ECL and vice versa Michael Chin
- Re: [SI-LIST] : Q: Plane-jumping return currents Larry Smith
- RE: [SI-LIST] : Q: Plane-jumping return currents Chris Cheng
- [SI-LIST] : return current distribution in diff pairs Eric Bogatin
- Re: [SI-LIST] : return current distribution in diff pairs Shimon Amir
- Re: [SI-LIST] : Q: Plane-jumping return currents Mike Jenkins
- Re: [SI-LIST] : Q: Plane-jumping return currents Doug
- RE: [SI-LIST] : return current distribution in diff pairs Mellitz, Richard
- RE: [SI-LIST] : Q: Plane-jumping return currents Doug
- Re: [SI-LIST] : Q: Plane-jumping return currents Jin Zhao
- Re: [SI-LIST] : Non-standard bus termination (2nd posting) sweir
- [SI-LIST] : Interconnect Coupling capacitance Udaysekhar Anumalachetty
- RE: [SI-LIST] : Q: Plane-jumping return currents Chris Cheng
- RE: [SI-LIST] : Different oz copper for grounds Mckinley, Jory
- Re: [SI-LIST] : Routing signals between ground and carved-up power [email protected]
- RE: [SI-LIST] : return current distribution in diff pairs Chan, Michael
- RE: [SI-LIST] : Different oz copper for grounds tomda
- RE: [SI-LIST] : return current distribution in diff pairs [email protected]
- [SI-LIST] : backside metal Tom Zimmerman
- [SI-LIST] : IBIS Summit - Thursday, 14-Oct-99 - AGENDA included Dr. Edward P. Sayre
- [SI-LIST] : Ibis models Jim Freeman
- [SI-LIST] : How to decouple POWER/GND , heavy current backplane liusl
- [SI-LIST] : Ibis models Jim Freeman
- RE: [SI-LIST] : Q: Plane-jumping return currents Chris Cheng
- [SI-LIST] : Guard trace question Gary Sanders
- RE: [SI-LIST] : return current distribution in diff pairs Chris Cheng
- Re: [SI-LIST] : Guard trace question S. Weir
- [SI-LIST] : Distinguishing Differential Models Abe Riazi
- RE: [SI-LIST] : Ibis models Abe Riazi
- RE: [SI-LIST] : Ibis models Syed Huq
- RE: [SI-LIST] : Guard trace question Shimon Amir
- RE: [SI-LIST] : How to decouple POWER/GND , heavy current backpla Heyfitch, Vadim
- RE: [SI-LIST] : return current distribution in diff pairs tomda
- RE: [SI-LIST] : return current distribution in diff pairs Chris Cheng
- RE: [SI-LIST] : return current distribution in diff pairs tomda
- RE: [SI-LIST] : Distinguishing Differential Models Abe Riazi
- RE: [SI-LIST] : How to decouple POWER/GND , heavy current backpla Salvador Aguinaga
- RE: [SI-LIST] : Ibis models Geoff Parker
- RE: [SI-LIST] : Ibis models Chris Rokusek
- [SI-LIST] : Rambus SI problems ... Andrew Phillips
- RE: [SI-LIST] : Ibis models Abe Riazi
- RE: [SI-LIST] : Ibis models Ingraham, Andrew
- [SI-LIST] : the old high-frequency return current model [email protected]
- RE: [SI-LIST] : Ibis models Geoff Parker
- RE: [SI-LIST] : Rambus SI problems ... Ron Nikel
- RE: [SI-LIST] : Rambus SI problems ... Chris Cheng
- [SI-LIST] : Signal integrity on www.ChipCenter.com Eric Bogatin
- RE: [SI-LIST] : the old high-frequency return current model [email protected]
- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- RE: [SI-LIST] : the old high-frequency return current model Chris Heard
- RE: can't seem to post- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- RE: [SI-LIST] : the old high-frequency return current model tomda
- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- [SI-LIST] : IBIS simulation of ZBT SRAM Arrigo Benedetti
- Re: [SI-LIST] : RE: Paper on IBIS simulation algorithm Bob Ross
- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- RE: [SI-LIST] : the old high-frequency return current model Eric Bogatin
- [SI-LIST] : Looking for good resources on SSTL transmission and termination.. Greim, Michael
- [SI-LIST] : Features to look for in an SI Tool Daniel Roganti
- RE: [SI-LIST] : Features to look for in an SI Tool phelan, tony
- RE: [SI-LIST] : the old high-frequency return current model Dr. John L. Prince
- RE: [SI-LIST] : IBIS simulation of ZBT SRAM tomda
- RE: [SI-LIST] : the old high-frequency return current model tomda
- RE: [SI-LIST] : Features to look for in an SI Tool Beal, Weston
- [SI-LIST] : Embedded Decoupling - The next Step in PWB Design Grasso, Charles
- Re: [SI-LIST] : the old high-frequency return current model Tadashi ARAI
- [SI-LIST] : IBIS Modeling Info Requested Fred L. Eatock
- RE: [SI-LIST] : IBIS Modeling Info Requested Patterson, Ken
- RE: [SI-LIST] : IBIS Modeling Info Requested Greim, Michael
- RE: [SI-LIST] : IBIS Modeling Info Requested Patterson, Ken
- RE: [SI-LIST] : IBIS Modeling Info Requested Somayaji, Anu
- [SI-LIST] : RE: winmail.dat files explained- and new .zip file that can be opened Eric Bogatin
- [SI-LIST] : Presentation Availability for Embedded Capacitance Grasso, Charles
- [SI-LIST] : Position Available Mike Fleice [CONTRACTOR]
- RE: [SI-LIST] : Proposal: Rs correlation/collaboration for W-Elem [email protected]
- [SI-LIST] : Clock Skew Measurements alext
- [SI-LIST] : internal series resistors Roman Seifert
- Re: [SI-LIST] : internal series resistors S. Weir
- [SI-LIST] : Dear XTAL expert... Yehuda D. Yizraeli
- RE: [SI-LIST] : Clock Skew Measurements [email protected]
- [SI-LIST] : Spread spectrum project David Enchelmaier
- [SI-LIST] : Spread spectrum project David Enchelmaier
- [SI-LIST] : The overshoot and undershoot criteria in PCI spec. =?big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- [SI-LIST] : The overshoot and undershoot criteria in PCI spec. =?big5?B?Sm9obiBMaW4gKKpMtMK31yk=?=
- Re: [SI-LIST] : Spread spectrum project Pat Zabinski
- Re: [SI-LIST] : Spread spectrum project Pat Zabinski
- RE: [SI-LIST] : The overshoot and undershoot criteria in PCI spe Volk, Andrew M
- RE: [SI-LIST] : The overshoot and undershoot criteria in PCI spe Volk, Andrew M
- RE: [SI-LIST] : The overshoot and undershoot criteria in PCI spe Ingraham, Andrew
- RE: [SI-LIST] : The overshoot and undershoot criteria in PCI spe Ingraham, Andrew
- RE: [SI-LIST] : Spread spectrum project Ingraham, Andrew
- RE: [SI-LIST] : Spread spectrum project Ingraham, Andrew
- RE: [SI-LIST] : Spread spectrum project Schanker, Jack
- RE: [SI-LIST] : Spread spectrum project Schanker, Jack
- [SI-LIST] : Spread spectrum project Sandy Taylor
- [SI-LIST] : Spread spectrum project Sandy Taylor
- RE: [SI-LIST] : Spread spectrum project David Enchelmaier
- [SI-LIST] : FCAL data pattern Chris Cheng
- [SI-LIST] : Of thermal reliefs and signal integrity.... Greim, Michael
- RE: [SI-LIST] : Of thermal reliefs and signal integrity.... Patterson, Ken
- RE: [SI-LIST] : Of thermal reliefs and signal integrity.... Dave Hoover
- RE: [SI-LIST] : Of thermal reliefs and signal integrity.... Dave Hoover
- Re: [SI-LIST] : Of thermal reliefs and signal integrity...... Mark Nass
- [SI-LIST] : Resistor Types for Terminations? Neeraj Sharma
- [SI-LIST] : micro BGA SI vrs PCB consideration Ilan Adar
- [SI-LIST] : HSPICE schematic entry and simulation interface Michael Gutzmann
- RE: [SI-LIST] : micro BGA SI vrs PCB consideration Dave Hoover
- RE: [SI-LIST] : micro BGA SI vrs PCB consideration Matt Kaufmann
- RE: [SI-LIST] : micro BGA SI vrs PCB consideration Dave Hoover
- RE: [SI-LIST] : micro BGA SI vrs PCB consideration Dave Hoover
- [SI-LIST] : SI simulation tools Nash, Chris
- [SI-LIST] : Intel apparenly has found the Rambus problem on the 820 (Camino) Per Torstein =?iso-8859-1?Q?R=F8ine?=
- Re: [SI-LIST] : Intel apparenly has found the Rambus problem on the 820 D. C. Sessions
- Re: [SI-LIST] : Intel apparenly has found the Rambus problem on the 820 Mike Mayer
- RE: [SI-LIST] : micro BGA SI vrs PCB consideration Dave Hoover
- [SI-LIST] : DDR-SDRAM specification Location Dr. Edward P. Sayre
- [SI-LIST] : DDR Synchronous DRAM - Samsung Semiconductor Michael Chin
- RE: [SI-LIST] : Thin Power Plane Dielectrics Grasso, Charles
- Re: [SI-LIST] : Resistor Types for Terminations? [email protected]
- [SI-LIST] : Source of Fish Paper Doug Piper
- [SI-LIST] : Effect of low Zo for unterminated lines Chris Bobek
- [SI-LIST] : Effect of low Zo for unterminated lines Chris Bobek
- AW: [SI-LIST] : Effect of low Zo for unterminated lines Andreas Lenkisch
- [SI-LIST] : SI Engineer Opportunity at Huawei--Shenzhen,China Rachild Chen
- RE: [SI-LIST] : Thin Power Plane Dielectrics Ingraham, Andrew
- RE: [SI-LIST] : Effect of low Zo for unterminated lines Chris Cheng
- RE: [SI-LIST] : Effect of low Zo for unterminated lines Dave Hoover
- RE: [SI-LIST] : Effect of low Zo for unterminated lines Greim, Michael
- Re: [SI-LIST] : Effect of low Zo for unterminated lines Chuck Hill
- Re: [SI-LIST] : Effect of low Zo for unterminated lines Donald Telian
- [SI-LIST] : SI papers for download Eric Bogatin
- RE: [SI-LIST] : Thin Power Plane Dielectrics Ray Anderson
- AW: [SI-LIST] : Effect of low Zo for unterminated lines Andreas Lenkisch
- Re: [SI-LIST] : Thin Power Plane Dielectrics Tom Woodward
- Re: [SI-LIST] : Thin Power Plane Dielectrics Craig Twardy
- RE: [SI-LIST] : Thin Power Plane Dielectrics Dave Hoover
- [SI-LIST] : XTK vs. Spectraquest......... Greim, Michael
- RE: [SI-LIST] : Thin Power Plane Dielectrics Hans Mellberg
- Re: [SI-LIST] : Thin Power Plane Dielectrics Ray Anderson
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Last message date: Wed 20 Oct 1999 - 10:53:47 PDT
Archived on: Wed Oct 20 1999 - 15:14:58 PDT
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