Re: [SI-LIST] : Preferred PWB impedances

John V Fitzpatrick ([email protected])
Wed, 19 Nov 1997 10:49:15 +0100

> If you could have only four 3.3v CMOS driver types, what
> would you have.

Very good question!

I don't know if it's possible to compare 3.3V I/O's from
different sources, but we recently selected a 9mA buffer as a
"standard" buffer.

The 9mA buffer corresponds to a 60 ohm reflected wave driver.
(Are there standard definitions of voltage levels which define
a "reflected-wave driver"?)

2 cases where the 9mA buffer is not used:

a) Really short connections between two ASICs.
Even at 100Mbit/s, it can be OK to have multiple reflections
(you need to use your imagination to see them!). So, in order
to reduce switching noise, a weaker driver is used.

b) PCI
If you stick to the spec, you have to use a 30-ohm
reflected wave driver, and lots of power/ground pairs.

So, that makes only 3 buffer types: 30-ohm, 60-ohm and something weaker.

Looking forward to hearing other opinions.
Will you post a summary of responses?

All the best,

John Fitzpatrick   <[email protected]>    
Alcatel Telecom, 4 rue de Broglie, 22304 Lannion, France
Tel: +33(0)  Fax: +33(0)

D. C. Sessions wrote: > > I had an interesting meeting late last week. VLSI is > drafting the specs for our newest I/O library and rather > than wet-finger it, we're asking for a little help in > making them meet real-world needs. > > Here's the question for the floor: > > If you could have only four 3.3v CMOS driver types, what > would you have. (Aside from HSTL, SSTL, etc.) One obvious > candidate is a reflected-wave driver for 50-ohm nominal > lines; that comes to about 10mA at 350mV from the rails > under worst case conditions. A 65-ohm reflected-wave > driver would run about 25% lighter, or about 8mA. > Incident-wave is another matter entirely. > > SO! the floor is open for nominations. Keep in mind that > excessively strong drivers are both inherently slower and > more vulnerable to SSO degradation. > > -- > D. C. Sessions > [email protected]