Re: [SI-LIST] : power supply filtering and bypassing

Michael T Zhang (Michael_T_Zhang@ccm.jf.intel.com)
Thu, 05 Mar 98 14:18:00 PST

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You can't blame the ATX power supply because of the long cabling. No
sliver box is capable of providing energy for high-speed switching. You
need to rely on local decoupling capacitors. Multiple 0.1u caps are
sometimes necessary. The parasistics of the caps need to be minimized so
that they can truly provide needed high-frequency energy. This probably
should be your #1 consideration.

-Michael Z

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Subject: [SI-LIST] : power supply filtering and bypassing
Author: owner-si-list@silab.Eng.Sun.COM at SMTPGATE
Date: 3/5/98 12:14 PM

I was browsing the web and happen to bump into this discussion group. The
discussions look to be pretty broad, so I hope by me being specific
doesn't violate the scope of the group.

I've been working with a high-speed (1Ghz+) point-to-point data link
chipset from HP called GLINK (HDMP-1022/HDMP-1024). Both receiver and
transmitter have built-in PLLs used for Transmit Clock generation and
Receive Clock extraction.
The application is PC based so I've been having problems attempting to
use off-the-shelf ATX PC switching power supplies.(i.e. 250W ASTEC) I've
discovered that the supplies have horrible (under and over shoot)
transients (1-100ms@100-500mv) causing loss of lock on the receive end. I
guess I shouldn't expect a lot for 30 bucks!!

The noise seems to correlate with disk accesses mostly (but even mouse
movement shows up), so I'm guessing the supplies have a regulation
problem with variable loads. I haven't gone as far as looking spectrally
at this because I'm not sure what frequencies and DB levels would cause
resonance and/or phase problems in the GLINK . I'm guessing this noise is
coupling in on the TX PLL causing enough/or right frequency jitter so
the receiver PLL loses track. If I cut the boards VCC line and wire in a
linear supply(don't use the PC's VCC, but use the GND), the link stays
solid. The only supply filtering recommendation from HP is the catch-all
0.1uf bypass, but this doesn't seem suitable, so I ask the following.

What is the best way to measure the frequency content of the noise?

Any good reference articles or papers for this situation?

I'm planning a layout change, separating the GLINK's power and ground
layer from the rest of the PCB and use a pi filtering arrangement to
connect the planes, I'm not sure what filter values would be acceptable
or if this is the right approach at all, any ideas?

Thanks.....Kevin

Kevin Skey
Northstar Technologies
Kevin.skey@northstarcmc.com
978-897-6600 x168

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Subject: [SI-LIST] : power supply filtering and bypassing
To: si-list@silab.Eng.Sun.COM
From: "Skey, Kevin" <kevin.skey@northstarcmc.com>
Date: Thu, 05 Mar 1998 2:41pm
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