[SI-LIST] : No subject given

johnlin@ccmail.arima.com.tw
Fri, 06 Nov 98 09:31:06 +0800

Hi all SI experts,

Does somebody know how to determine the trace width and trace spacing
for differential signals such as USB or LVDS?

For example, the USB signal, Intel recommands 45 ohms for single
trace impedance and 90 ohms for differential impedance. I find 12mils
for trace width and 32mils for space for my pcb stackup will meet the
spec. Also I find 6 mils width and 8 mils spacing will also meet 90
ohms differetial impedance but 58 ohms for single trace.

I believe that all I need to take care is 90 ohms differential
impedance instead of 45 ohms for single trace. Am I right?

What will be different between them (12x32 and 6x8)?

I think that the spacing of 32 mils is too big because the
differential pair shall be routed closely to cancel common mode noise.

Are there any disadvantages for high single trace impedance but same
diffential impedance?

Can we have long stub topology, such as "Y", for the differential
signal routing? Shall the reflection on the pair be cancelled because
of common mode cancellation?


Thank you for your reply in advance.

John Lin
CAE Manager at Arima computer corp.
Email: Johnlin@ccmail.arima.com.tw





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