Re: [SI-LIST] : Mixed signal - PWR and GND configuration issue

John Fisher ([email protected])
Sun, 19 Jul 1998 15:22:19 -0700


There is a good reference note on this topic published and in print by
Analog Devices. Its in their "High Speed Design Techniques" see Chapter
7 "Grounding in High Speed Systems" by W. Kester and J. Bryant.=20



John M. Fisher -- Cisco Systems -- [email protected]

170 W. Tasman Dr., Bldg G, San Jose CA 95134-1706

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Signal Integrity Engineer, Enterprise Line of Business

408-527-9186, Fax 408-526-5504, N6PFN


At 03:51 PM 7/17/98 -0400, Chris Roberts wrote:=20


<excerpt><smaller> I am currently designing a high speed (50+ MHz)
mixed signal board that is used in a larger multimodule system. There
are a number of both A/D and D/A Converters on the board with two
distinct areas of analog and digital processing circuitry. We are able
to maintain pretty good physical isolation between the IF analog block
and the high speed digital signal processing block. I am looking for
some input on how to handle the power and ground structure of this board
to maintain the signal integrity of the analog circuit. We do currently
have separate analog and digital power supplies available. =20
There are three main areas of concern. </smaller> <smaller>First, how
do we best handle the ground boundary between the analog and digital
circuits given that we have multiple ADCs and DACs straddling this
boundary? Should we use one solid GND plane? If not, how should they
then be tied together (if at all?) to avoid gound loop issues?=20
</smaller> <smaller>Second, how should we handle the board ground
relative to chassis </smaller> <smaller>GND. Should we tie the analog
GND, digital GND, or both to chassis GND on this board or should the only
connection to chassis GND be at the power supply? </smaller>=20
<smaller>Third, within the analog circuit, we have isolation concerns
between high and low level analog signals. We are looking for the best
power supply filtering solution (ferrite beads?) which will allow us to
better isolate the sections of the analog circuit from each
other.</smaller> <smaller>Thanks</smaller> <smaller>Chris Roberts,
Telecom Analysis Systems</smaller> <smaller>[email protected]</smaller>=20