Re: [SI-LIST] : Preferred PWB impedances

John V Fitzpatrick (John.Fitzpatrick@ln.cit.alcatel.fr)
Wed, 19 Nov 1997 18:41:00 +0100

DC,

Just to clarify 2 points:

> > > a) Really short connections between two ASICs.
> > > Even at 100Mbit/s, it can be OK to have multiple reflections
> > > (you need to use your imagination to see them!). So, in order
> > > to reduce switching noise, a weaker driver is used.
>
> I'm assuming that you mean the drivers are weaker than 9mA and
> that it takes several reflections to stairstep up to the rails.
> That's a good way to avoid overshoot under best-case conditions
> but there's no real virtue to making the outputs weaker than
> what would give you reflected-wave at best-case.

No, the aim is to reduce pincount. If there is sufficient timing
margin to allow a weaker buffer to be used, then the weaker buffer
is better because the SSO noise will be reduced.
To stop me asking for a weaker buffer, just publish the same SSO
figures for a 9mA and, say, a 3mA buffer :-)

>
> > > b) PCI
> > > If you stick to the spec, you have to use a 30-ohm
> > > reflected wave driver, and lots of power/ground pairs.
>
> Intel calls PCI a reflected-wave switching environment, but
> it's really just the same old TTL-type signalling with some
> limits to keep the worst violations from getting out of hand.
> It's a cut-to-fit job instead of a designed-from-first-principles
> high-speed bus. That's OK, but we shouldn't kid ourselves.
>


I'd really love to read the minutes of the original PCI meetings.
I am still quite impressed with the electrical part of the
spec. Especially how it takes into account component
manufacturers resistance to change their electrical specs!!

The 5V spec is indeed TTL with well-specified output characteristics,
The 3V spec. is different. Very importantly, it tightens the
input thresholds. Unfortunately, I've rarely seen an ASIC
supplier put these thresholds in his databook!!

As far as I can make out, the PCI buffer is indeed a 30-ohm
driver. One example of a load was given in an early version
of the spec: called Speedway, it had regularly spaced loads
connected by 65 ohm tracks, giving an effective impedance of
about 30 ohms. 30 ohms should also be the impedance of a
CompactPCI bus. Even if the loads are unevenly spaced, and
minimum length routing is used, a 30-ohm driver is appropriate.

Unfortunately, if you use a 30-ohm driver, and you have, say,
unfilled slots, or few, widely-spaced loads, then ringing
will be a problem.

So I think there still is a need for strong buffers (18mA).
Especially for the CompactPCI folk, or anyone else who has
an unterminated, high-speed backplane buse driven directly from
an ASIC or FPGA.

Cheers,
John