As power supply voltages go down and power goes up on our modern ASICs,
the current is going 'up squared'. The power distribution problem is
becoming more critical and any inductance in that circuit hurts our
L*di/dt performance. IMO, all digital circuits should get their power
by vias going directly to the power planes. Then we need to carefully
decouple the planes over all frequencies up to twice the clock. If there
is a sensitive analog circuit that needs clean power, then filter the
digital supply somewhere between the PCB power planes and the analog
circuit that consumes the power.
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>From ingraham@wrksys.ENET.dec.com Mon Apr 28 08:53:57 1997
Date: Mon, 28 Apr 97 11:40:12 -0400
From: ingraham@wrksys.ENET.dec.com (Andy Ingraham)
Subject: Power/ground connections/bypassing on ICs
I am tempted to open, once again, the discussion about how to connect
power and ground pins to ICs on a multi-layer PCB, and how best to
I have held the firm belief that IC power and ground pins should
always be tied right to their planes as soon as possible, with the
shortest trace lengths. Then bypass capacitors can be added near
Some have suggested the alternative of bringing power and ground from
the planes, first to the bypass capacitor, and then to the IC pins,
something like this:
vias | |
| | | |
bypass | |
capacitor ###| |###
I feel this is dangerous because of the added inductance. The
power/ground planes are your best high frequency bypass capacitor
(although a small one), so I'd think you want to get your IC pins
brought to them as quickly as possible, without wasting etch going to
a discrete capacitor which may not be very effective anyway if it's
above self resonance. Also the power and ground pin inductance is
effectively in series with all output drivers when they switch. So
I avoid this technique.
But I recently had a short discussion with an engineer who promoted
the latter, and insisted it was better in mixed-signal environments.
Most of my work has been straight digital lately, though I do find
myself surrounded by a smattering of mixed-signal components for such
things as ethernet.
The presumed justification is that these mixed-signal devices benefit
from the additional small filtering provided by the trace inductance.
By the way, the IC under discussion had all digital inputs and
outputs, but some internal clock re-timing, and no vendor
recommendations regarding power filtering.
Does it make sense to do this? Do I want to adopt a strategy of using
the first method for straight digital devices, and the second method
for mixed-signal devices that don't use filtered power?
Is it wise to do this with both power and ground leads? Or should
ground pins always route directly to the ground plane, with longer
traces in only the power leads? (Assuming no PECL, of course.)
Thanks for advice.
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