It depends on how long it takes for the current to drop to a certain level (eg 0mA)
but 1nsec seems to be acceptable (i.e. those i/o buffers switching within 1nsec
are considered as simultaneously switching).
Dr. Alaa F. Alani
Senior Signal Integrity Eng.
> From si-list-approval@silab.Eng.Sun.COM Fri Dec 19 23:15:02 1997
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> Date: Fri, 19 Dec 1997 10:50:28 -0800
> From: email@example.com (Praveen G Shekokar)
> To: si-list@silab.Eng.Sun.COM
> Subject: [SI-LIST] : SSO : How to identify SSO groups?
> Sender: owner-si-list@silab.Eng.Sun.COM
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> We are using our foundaries SSO rules to calculate number of VDD/VSS
> pins required for our ASIC. Before we can use the SSO rules we need to
> identify signals that form a SSO group. The conventional technique I know
> of is to group signals of similar functionality into a SSO group e.g.
> Address/Data bus.
> In practice we have noticed that not all the signals of such a group have
> identical delays. Further they may not have identical output loads. Variable
> delays implies that not all the outputs switch at the same. E.g.
> Let output1 switch at time T and output2 at time T+t1. If t1 is small then the
> switching current for output1, say I1, will overlap with switching current
> for output2, say I2, leading to overall increase in the switching current.
> But if t1 is more than the time required for I1 to reduce to 0 then the
> overall switching current is going to be limited to max of I1 and I2.
> I want to know whether there are any guide lines for value of t1 that one
> can use to decide whether a signal is part of a SSO group.
> Value of t1 is also required in designing address/data stepping.
> - Praveen Shekokar