[wrt: IBIS v/t curves modelling crowbar current in CMOS]
> This is not really true. The V/T curve in the IBIS model definition does not
> give any information about the PMO/CMOS overlapped current.
> The V/T describes the behavior of the buffer output versus frequency but does
> not give any information on the current passing internaly through the output
> To know the value of the through current it is necessary to know the "Ron"
> variation of the two transistors during the transition periode. The value of
> this current depends upon the equivalent impedance of the two transistors,
> impedance which is connected between Vdd and Vss power supply.
The IBIS v/t curves (four, note: one each with the load to power
and one with the load to ground for both rising and falling edges)
give the full picture. The turnon of the pullup device is given
by the rising edge/grounded load curve; the turnoff of the pullup
is given by the falling edge/grounded load curve. The turnon of
the pulldown device is given by the rising edge/pullup load curve;
the turnoff of the pulldown is given by the falling edge/pullup
load curve. Crowbar current on the rising edge is just the
overlap between the pullup turnon and pulldown turnoff, and on
the falling edge between the pulldown turnon and pullup turnoff.
Also, the crowbar current in CMOS outputs (esp. tristate ones, and for
practical purposes that means all of them) is very low by design. At
least the ones I design are, and I have yet to see any others that act
differently. Unlike internal gates output drivers have separate paths
for turning on the pullup, turning off the pulldown, turning on the
pulldown, and turning off the pulldown. As a result it's easy to turn
the driver devices OFF faster than ON, and since crowbar current not
only wastes power but slows down the buffer I have a hard time imagining
a competent designer shipping a driver that has more than trivial
-- D. C. Sessions email@example.com