Re: [SI-LIST] : bypass cap question (long, simple)

Fred Balistreri (fred@apsimtech.com)
Tue, 03 Feb 1998 12:02:39 -0800

Nirmal Jain wrote:
>
> Dear Jeff,
>
>
>
> > Just to add a question to this fine discussion, what role
> > does the capacitor formed by the laminate between reference
> > planes play? A great many designs are organized in strip-
> > line pairs, with signals contained in such a cavity.
>
> The capacitor formed by the GND/PWR plane is generally
> referred as "Integrated Decoupling Capacitor" and the
> frequency response of the integrated decap (very high Q)
> is generally much better than the discrete decap.
> To increase the capacity of this decap you need to
> reduce the thickness of the laminate between the
> GND/PWR planes and/or use high dielectric constant materials.
>
> For a 10 cm sq. board with 5 mil (127micron) thick laminate
> (diel constant of approx 4) between the GND/PWR plane would
> give you approximately 2787 pF.
>
> As to whether you would go for stripline or the microstrip
> configuration with GND/PWR plane on one side would be decided
> by what are the issues in the designs such as controlled Zo,
> cross coupling or switching noise.
>
> Regards
>
> Nirmal
>
> >
> > Regards,
> > --
> >
> > Jeff Seeger Applied CAD Knowledge Inc
> > Chief Technical Officer Tyngsboro, MA 01879
> > jseeger "at" appliedcad "dot" com 978 649 9800
>
> --
> Nirmal Jain Ansoft Corporation
> (412)261-3200 X129 (W) Four Station Sq., Suite 660
> (412)261-471-9427(FAX) Pittsburgh, PA 15219
> _________________________________________________________________________
> Check out Ansoft's WWW site at http://www.ansoft.com for product
> information, technical support, employment opportunities, much more...
> -------------------------------------------------------------------------
I concur with Frank and Nirmal. Its not a good idea to split the power
plane unless you have no choice. If you do split the plane you would
have to understand the consequence of the return currents especially
on the high speed signals. Also generally speaking for high speed
applications the 8 layer board would be a better choice for SI/EMI
purposes. It is best to keep the power/gnd planes "clean" by making a
gnd/power core. This view of course is strickly from an SI/EMI
perspective. There are other considerations such as cost, manufacturing,
etc.

Best Regards,

-- 
Fred Balistreri
fred@apsimtech.com

http://www.apsimtech.com