Layers Sig4 and Sig5 use the Thermal layer as partial reference.
What's the AC noise between chassis and circuit ground?
Do you want to couple circuit ground to chassis, and vice-versa, by
way of this path?
Will you add discrete capacitors from the Thermal layer to Gnd layers
in areas of high via and pin density, to help the return currents pass
Do you really have four signal layers sandwiched between Gnd layers 11
and 16 (assuming all 13 layers are mirrored as you indicated)?