[SI-LIST] : Re: QUAD Model & Device capacitance

Jon Dowling (jdowlin2@ichips.intel.com)
Wed, 15 Apr 1998 10:18:34 -0700


Mark,

The modeling approach you suggest is reasonable.

Jonathan Dowling
Intel Corp.

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Date: Tue, 14 Apr 1998 14:30:49 -0700
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From: Mark Nass <markn@rccorp.com>
Subject: [SI-LIST] : QUAD Model & Device capacitance
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I have a question about the value of CEFF: in a QUAD model
I was given the diagram of an output buffer we are using, see diagram
below, and I am confused on what value I should use for device capacitance.
My feeling is that the 1.7pf, 2.2pf & 1.6pf are "embedded" in the Rise/Fall
times & VI curves because the QUAD model data was generated from HSPICE
models.
This would mean that I would need to add the 3.0pf and 3.1pF to get a total
device capacitance of 6.1pF, and this would be the value in my SHUNT
statement.
Any QUAD experts out there with an answer or opinion?

Thanks,
Mark Nass

Power
_|
| | Power
-------| | |
| |_ |
1.7pf > | ___|___ ------
Junction | | | | |
|--------| |________| | 3.1pf Metal
2.2pf | ^ ^ | |
Junction >| 1.6pF 3.0pF ------
| | Junction Junction
-------| |
| |_
|
|
|
GND

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