RE: Re[2]: [SI-LIST] : power supply filtering and bypassing

Skey, Kevin (kevin.skey@northstarcmc.com)
Fri, 06 Mar 1998 1:31pm

Ed,
You just answered something that I thought was strange, but makes more
sense now. Some of the original app notes from HP showed the 0.1uf IC
bypass with series resistors, but there was never any discussion on it or
mention of value, so I just ignored them thinking miss print. Then my
original assumption was confirmed because the newer spec shows just the
0.1uf without the resistor. Now I'm thinking again.......

Also, I have 12V on the board so I think I'll try the regulator approach
first since a few other people suggested the same.

Thanks...
Kevin Skey
-----Original Message-----
From: ed_crean [SMTP:owner-si-list@silab.Eng.Sun.COM]
Sent: Friday, March 06, 1998 8:00 AM
To: kevin.skey; crash
Cc: si-list
Subject: Re[2]: [SI-LIST] : power supply filtering and bypassing

Having used card entry LC filters before, there are many pitfalls
associated
with them. For sure, the filter should be layed out with a series
damping
resistor between the capacitor connections and ground. This resistor
value
can
be on the order of 1 ohm, and will dampen any filter resonance. If the
damping
resistor is left out, it is possible that a transient at the frequency of

L1-(C1+C2+Cxx) could ring the filter, exacerbating whatever peak
amplitude
occurs at the input.

The filter can be easily modeled on PSPICE. Measuring the freq response
of
the
filter is not an easy task - as the filter response will be very
sensitive to
source impedance.

Of course, the best solution is a low droput linear regulator - I'm
assuming
you
don't have the voltage headroom to use a regulator.

Ed Crean

______________________________ Reply Separator
_________________________________
Subject: Re: [SI-LIST] : power supply filtering and bypassing
Author: Paul Thompson <crash@apple.com> at SMTP
Date: 3/5/98 4:14 PM

At 2:41 +0000 3/5/98, Skey, Kevin wrote:
>I'm planning a layout change, separating the GLINK's power and ground
>layer from the rest of the PCB and use a pi filtering arrangement to
>connect the planes, I'm not sure what filter values would be acceptable
>or if this is the right approach at all, any ideas?

Do isolate and filter the power, but think twice before chopping into the

ground plane. This can cause new problems for signals that need to cross

the split, as the return currents won't have a good path which can result

in degraded signal quality and higher EMI. A safer approach is to leave
the ground plane intact, and make sure all traces going over the split
are
closer to that plane than the power plane. This will minimize image
currents in the power plane.

As to the type of filtering for the power, you can use either an inductor

or resistor in series with the power (if your average current draw is low

enough so the IR drop is acceptable), and then a variety of caps on the
isolated plane. For instance you might try something like a 47uF
Tantalum
and a 2.2uF ceramic (in addition to the .01uF's right on the power pins).

You'll see a dramatic decrease in noise.

If the IR drop is critical, then using a linear regulator from a higher
voltage rail serves as a good filter, albeit at a higher price.

--
Paul Thompson crash@apple.com
System Integrator, Macintosh Desktop Systems Apple Computer