Re: [SI-LIST] : Modeling Package parasitics

D. C. Sessions (dc.sessions@tempe.vlsi.com)
Mon, 16 Feb 1998 16:13:46 -0700

Mark Nass wrote:
>
> Does anybody have an accurate way of modeling package parasitics,
> in particular in a QUAD simulation environment. I have been using
> a lumped inductance for a BGA & SQFP package but find this to be very
> inaccurate with fast edge rates and small voltage level swings. The ringing
> from the inductor causes the signal to cross switching thresholds in the
> simulation environment, but this ringing is not seen on the lab bench.
> My feeling is that a specified ZO, TPD & and Length should be used
> for the bonding wire, trace on the BGA package and the pin.
> Does anybody have any thoughts on what values I could use for
> the bonding wire?

Bondwires are actually very good inductors. The package itself
may be a PWB in implementation (consider BGAs). A good figure
for bondwire inductance is 40uH/in.

One of the reasons that many simulations show excessive ringing
on ICs is that the capacitors are too high-Q. Most semiconductor
capacitances (such as the ESD structures on I/O circuits) have
quite large ESRs. Your best bet would be to correlate the ESR
to the lab data.

-- 
D. C. Sessions
dc.sessions@tempe.vlsi.com