From: Ozgur Misman (firstname.lastname@example.org)
Date: Tue Feb 13 2001 - 15:02:51 PST
We have capital to put together a TDR analysis capability for high speed
interconnect characterization. our focus is mainly BGA, leadframe and high end
1500+ I/O flip chip packages with interconnect length ranging from 2 mm to 20
mm. As in any package construction vias, traces, solderballs, chip bumps etc
make up a signal net.
We are in the process of determining what equipment we would need to properly
characterize interconnects ( at package level) with risetimes as low as 50~100
picosecond. We would also include differential pair characterization as well
since wee see the use of differential pairs at package level more and more.
If you would send some feedback on your experience with TDR equipment, or a
setup that works in high speed domain and provides good repeatibility, I would
ver much appreciate your feedback.!.
Thanks in advance
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