From: Chris Padilla (firstname.lastname@example.org)
Date: Wed Oct 04 2000 - 18:05:24 PDT
Do your best to group components with the same voltage requirements--this
will help with routing from your DC-DC converters and help keep your
(unfortunately) needed power plane cuts organzied.
The most important note from an EMI perspective is to be careful of the
routing of the signals that will (might) reference the split power
plane(s). Do not under any circumstances have signals crossing the cuts in
the referenced, split power plane(s). Keep high-speed and sensitive
signals off of the layer(s) that reference the split power plane(s). If
you are carefull and allocate certain signals to certain planes, you should
be okay when throwing the board into the autorouter.
Be especially carefull with the I/O section in regards to all this.
It appears that most of your board will need 1.8 V (?) and you should
probably dedicate a whole, uncut plane to that voltage. Hmmm, 5 V will
need 8 amps as well....
I have had success with the following stack-ups:
T-P-G-S-S-P-G-S-S-G-P-B (12 layers)
T-G-P-S-S-G-S-S-G-S-S-P-G-B (14 layers)
T-G-S-S-G-P-P-G-S-S-G-B (12 layers)
or any derivative of these--you get the idea here. T=top layer, G=gnd
plane, P=pwr plane, S=signal plane, B=bottom layer. Swap P-Gs around if
need be as well (like G-P....).
They are all symmetrical and utilize P-G "sandwiches" in their design. The
nice thing about the last one is that you can carve the power planes up as
much as you want but you've no worries about crossing cuts! Also, you get
a "doubling up" of interplane capacitance as well!
I am sure others will chime in with things I've glossed over. I hope this
gets you started.
At 05:13 PM, Jeff Reeve wrote:
>I apologize in advance if this issue has been beat to death already&but
>here it goes&.
>I have a board with multiple power rails 12V, 5V, 3.3V, 2.5V and 1.8V. It
>seems like overkill to make separate power/gnd planes for each of the
>voltages&sheesh 10 planes to handle power! So what are you guys out there
>doing to limit the number of planes and yet still maintain low EMI? I
>would like to implement in the least planes possible and maintain 50-55
>ohm impedance. Signal rates will be up to 100MHz. 1.8V will carry up to
>8A, 2.5V will carry up to 6A, 3.3V will carry up to 4A, 5V will carry up
>to 8A and 12V will be less than 1.5A. Typical devices on this board are
>FPGAs, SDRAM, RiscProcessor, Multi-media Processors, 10/100 Ethernet chip
>sets, SCSI chip sets, IDE chipsets, USB chipsets, etc. Anybody willing to
>share recommended stack up?
>Any advice and other pearls would be most appreciated!
**** To unsubscribe from si-list or si-list-digest: send e-mail to
email@example.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:29:40 PDT