[SI-LIST] : multiple power planes

About this list Date view Thread view Subject view Author view

From: Jeff Reeve (jtreeve@foxinternet.net)
Date: Wed Oct 04 2000 - 17:13:54 PDT


I apologize in advance if this issue has been beat to death already…but here
it goes….

I have a board with multiple power rails 12V, 5V, 3.3V, 2.5V and 1.8V. It
seems like overkill to make separate power/gnd planes for each of the
voltages…sheesh 10 planes to handle power! So what are you guys out there
doing to limit the number of planes and yet still maintain low EMI? I would
like to implement in the least planes possible and maintain 50-55 ohm
impedance. Signal rates will be up to 100MHz. 1.8V will carry up to 8A, 2.5V
will carry up to 6A, 3.3V will carry up to 4A, 5V will carry up to 8A and
12V will be less than 1.5A. Typical devices on this board are FPGAs, SDRAM,
RiscProcessor, Multi-media Processors, 10/100 Ethernet chip sets, SCSI chip
sets, IDE chipsets, USB chipsets, etc. Anybody willing to share recommended
stack up?

Any advice and other pearls would be most appreciated!

Jeff

**** To unsubscribe from si-list or si-list-digest: send e-mail to
majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:29:39 PDT