[SI-LIST] : Match of differential pairs

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From: Martyn Gaudion (Martyn@gaudionm.freeserve.co.uk)
Date: Tue May 09 2000 - 15:46:33 PDT


Hi everyone,

Can anyone help on the following subject? My customers
are in the PCB manufacturing industry and are increasingly
called to build differential striplines, however on fine line
boards it is very hard to make an exact match of the signal
pair.

This obviously has effects on cmrr, emc etc, but I cannot find
any documents that define how much mismatch is acceptable on
a differential pair.

National have a good app note on LVDS for example but when
matching is discussed it simply says good match is necessary.

This was easy on 7 or 8 mil line width, much less so at 3 to 4 mil.

Look forward to your input

Kind regards
Martyn Gaudion
martyn.gaudion@polar.co.uk
www.polarinst.com

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