Date: Wed Aug 23 2000 - 05:28:26 PDT
We are looking for SI-engineering people in Nokia Switching Platforms
Open position for
Signal integrity engineer
In this position, you will design and perform analog simulations
of system level interconnects for multiprocessor based platforms.
You will also:
- Perform I/O buffer model IBIS design/selection, transmission
line models, and package parasitic models for accurate correlated
- Perform system level critical path timing analyses
- Modeling, analysis and selection of system level interconnect
- Responsible for Board design rules ( stack-up, trace widths,
lengths, clocks) to drive hundreds of megabytes to gigabytes
buses across backplanes, daughter cards and cables.
This position requires a BS/MS in EE or CompE and at minimum 3
years of design experience.
High speed data communications hardware design experience.
The ideal candidate would be one who is interested and works
well in a team environment and has specific experience with
the following areas: schematic capture, board design and CAD
layout support. Lab debug skills are preferred.
An emphasis on quality is important and would include documentation,
testing, and simulation of timing and signal integrity.
Experience with high speed digital and analog circuit design and
Espoo/Makkyla (near Helsinki), Finland
We are looking for both experienced and starting level professionals
with capabilities to learn.
Please send resumes to Tapio Kallioniemi:
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