From: Moran, Brian P ([email protected])
Date: Wed Aug 09 2000 - 08:26:42 PDT
Hi All,
A couple quick comments
1) The purpose of thieving pads is, as mentioned, to balance out the plating
density over the surface. One obvious way to do this, back in the through
hole days, was to use a pattern similiar to the pad pattern on DIPs, ie; 55
mil round pads on a 100 mil grid, since plating features where predominately
pads. The same approach can be used today using the primary pad geometry,
perhaps 25 mil pads on a 50 mil grid. This gives a good approximation of the
average density. Perhaps 25 mil on 62.5 grid, on less dense designs.
2) Using a fill pattern does not solve the problem, since it over
compensates plating in the opposite direction. Now you have large areas of
solid copper, vs large areas of no copper. However, there are power plane
impedance advantages to flooding, but this is not thieving.
3) As far as impedance effects, if you have the luxury of treating the
thieving pad patterns as vias sites, all the way through the board, you will
not impact impedance on routed traces. With channel routers this was easy.
With gridless routers you have to actually lay down pads.
Brian P.Moran
Signal Integrity Engineering
Desktop Platforms Group
Intel Corp.
Folsom, CA
-----Original Message-----
From: Scott McMorrow [mailto:[email protected]]
Sent: Tuesday, August 08, 2000 2:28 PM
To: Ravi Kiran
Cc: [email protected]
Subject: Re: [SI-LIST] : Effects of thieving on SI and EMC.....
Ravi,
If the thieving structures are spaced 20 times the dielectric thickness from
all signals in all directions x, y and z, then there will be no measurable
effects on characteristic impedance. It is the z-axis that is most easily
overlooked.
scott
Ravi Kiran wrote:
> Scott,
>
> When we stich this to Ground I agree that will reduce the resonance
effects
> but what about the impedance of the traces. what will be the effect on the
> characteristic impedance?
>
> Ravi
>
> Scott McMorrow wrote:
>
> > Hey ... a good place to apply the 20H rule
> >
> > i.e. non signal related metalic structures should be
> > spaced a minimum of 20 times the height of the
> > trace to plane spacing away from all active
> > signaling lines to reduce parasitic coupling.
> >
> > As Pat has also pointed out, any large structure
> > should be stitched to ground to reduce resonance
> > effects. The distance between stitch vias should
> > be smaller than lambda/10 of the highest frequency
> > component that one wants to rid freespace of.
> > (Or keep from entering through freespace.)
> >
> > regards,
> >
> > scott
> >
> > --
> > Scott McMorrow
> > Principal Engineer
> > SiQual, Signal Quality Engineering
> > 18735 SW Boones Ferry Road
> > Tualatin, OR 97062-3090
> > (503) 885-1231
> > http://www.siqual.com
> >
> > Chris Padilla wrote:
> >
> > > Michael,
> > >
> > > From an EMI perspective, I have yet to notice any
> > > measurable difference between "thieved" and "non-
> > > thieved" boards.
> > >
> > > We tell our fab vendor to keep the pattern at least
> > > 400 mils away from any trace, via, pad, part, etc.
> > >
> > > As you point out, thieving increases manufacturability
> > > by minimizing warping of the board.
> > >
> > > ----->Chris
> > >
> > > >A thieving pattern is a bunch of very small shapes
> > > >added to a layer that helps equalize the plating
> > > >across a given layer (increases manufacturability).
> > > >An auto thieving utility or program uses a set of
> > > >criteria to determine how and where to put these
> > > >shapes. Unfortunately these programs are almost
> > > >exclusively focussed on mfg issues and not SI or
> > > >EMC issues.
> > > >
> > > >Usually if you see a bunch of 1/16" width diamonds
> > > >on an artwork layer, this is thieving.
> > > >
> > > >FYI
> > > >
> > > >MG
> > > >
> > > >-----Original Message-----
> > > >From: Ray Anderson [mailto:[email protected]]
> > > >Sent: Monday, July 31, 2000 11:12 AM
> > > >To: Greim, Michael
> > > >Cc: SI LIST
> > > >Subject: Re: [SI-LIST] : Effects of thieving on SI and EMC.....
> > > >
> > > >
> > > >OK, I'll bite. Educate me, what is a thieving pattern,
> > > >and an auto-thiever ????
> > > >
> > > >
> > > >-Ray
> > > >
> > > >
> > > > > Does anyone out there have a tool or reference
> > > > > that would allow one to calculate the effects of
> > > > > thieving patterns on signal integrity and EMC.
> > > > >
> > > > > I am trying to come up with appropriate rule sets
> > > > > for driving an auto-thiever utility.
> > > > >
> > > > > Thanks for the help.
> > > > >
> > > > > MG
> > > > >
> > > >
> > > >**** To unsubscribe from si-list or si-list-digest: send e-mail to
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> >
> > --
> > Scott McMorrow
> > Principal Engineer
> > SiQual, Signal Quality Engineering
> > 18735 SW Boones Ferry Road
> > Tualatin, OR 97062-3090
> > (503) 885-1231
> > http://www.siqual.com
> >
> > **** To unsubscribe from si-list or si-list-digest: send e-mail to
> > [email protected]. In the BODY of message put: UNSUBSCRIBE
> > si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
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> > ****
>
> --
> Ravi Kiran 1-650-625-2225
> Sr. Hardware Engineer
> Nokia IP Routing Group
> 313 Fairchild Drive
> Mountain View, CA 94043
-- Scott McMorrow Principal Engineer SiQual, Signal Quality Engineering 18735 SW Boones Ferry Road Tualatin, OR 97062-3090 (503) 885-1231 http://www.siqual.com**** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
**** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
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