From: Doug McKean (firstname.lastname@example.org)
Date: Mon May 22 2000 - 13:50:20 PDT
Well, I was involved with a vendor in the redesign of the
board of a product (can't go any further, proprietary stuff).
An emi issue. Well known vendor, small board 10 cm by 13 cm.
Using a split plane config for 3.3V and 5V in one of their
In order to get to where I wanted to go, they proposed a
three phased revision at the board level checking each rev
as they went along. Instead of restacking the board, which
I wanted them to do outright, they did a stitching of the
splits between power planes with caps as their first rev
since it was quick and cheap. It bought them absolutely
nothing. And they were very careful with the cap selection.
Around the 200 MHz to 500 MHz range.
- Doug McKean
Barry Ma wrote:
> Actually in Brad's case, there's no need to stitch up the gap
> between 3.3V and 5V areas because no signal trace would use this
> pwr plane for return plane. Sorry, it was Friday evening when
> I was in a hurry to reply Brad's Email.
> Generally speaking, many EMC design engineers stitch the gap
> between different pwr areas on the same pwr plane with capacitors,
> allowing RF return signal to flow across the gap. …The value and
> interval of those caps depends on the frequency of the RF signal.
> Barry Ma
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