Re: [SI-LIST] : Differential Clock Signal Pair

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From: Doug Brooks (doug@eskimo.com)
Date: Mon May 15 2000 - 12:50:15 PDT


Differential signals are a special case of crosstalk coupling where the
correlation between the signals is (a) known and (b) perfectly correlated
with each other with (c) a correlation coefficient of -1. In this special
case, you WANT the crosstalk coupling --- it works in your favor. So you
want the traces to be as close as possible (practical).

To see some of the mathematics of why, see the article "Impedance
Terminations, What's the Value" on our web site at
http://www.ultracad.com

Doug Brooks

At 09:37 AM 5/15/00 -0700, you wrote:
>Hi everyone,
>
>I have a simple question about trace layout design for a differential clock
>signal pair of high-speed CMOS memory packages. I have two design
>guidelines for that as follows:
>
>1. SPACING between a differential clock signal trace pair must be
> MINIMIZED as well as matched in length in order to reduce noise.
>
>2. Differential clock signal trace pair must be matched in length in order
> to achieve matched electrical characteristics, but SPACING between
> them must be MAXIMIZED in order to reduce crosstalk noise.
>
>Which do you prefer?
>
>Thanks and regards,
>
>Brian

.
************************************************************
Doug Brooks' book "Electrical Engineering for the Non-Degreed
Engineer" is now available. See our web site for details.
.
Doug Brooks, President doug@eskimo.com
UltraCAD Design, Inc. http://www.ultracad.com

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