Re: [SI-LIST] : RE: Another decoupling question

D. C. Sessions (dc.sessions@vlsi.com)
Mon, 20 Sep 1999 09:08:12 -0700

"Volk, Andrew M" wrote:
>
> Chris -
>
> I agree the best capacitance is on-die. It is expensive in die area, but
> becoming more and more essential as edge rates and speeds increase.
> However, there exist devices already without such provisions and I was still
> wondering whether capacitors can be placed under BGA packages to help
> existing power decoupling problems. Is it cost effective and
> manufacturable?

On-chip decoupling isn't so much expensive in die area (because die
area is generally interconnect-dominated) but it does impact on yield
because of the increase in gate-oxide area where a gate failure can
cause a supply short.

> -----Original Message-----
> From: Chris Cheng [mailto:hycheng@3pardata.com]
> Sent: Friday, September 17, 1999 1:52 PM
> To: si-list@silab.eng.sun.com
> Subject: RE: [SI-LIST] : RE: Another decoupling question
>
> for ~10nf, you are better of putting it insider the die. (yes, on
> die decouping)
> chris

-- 
D. C. Sessions
dc.sessions@vlsi.com

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