Part of my job responsibilities involves verification and conversion
(from IBIS to QUAD) of a wide variety of IBIS models, as a preparation
for use in a SI simulation. Furthermore, the Driver models often
require calibration for determination of exact Time_To_Vm, after
conversion to QUAD. Behavioral model verification is a multi-step
process, one of which demands a careful examination of the model's pin
and package parasitics (i.e. R_pin, L_pin, C_pin, R_package, L_package
Parasitic parameters will impact the results of a signal integrity
simulation and should be complete and accurate. For purpose of
completeness, values are needed for Max (Fast), Typical and Min (Slow)
simulation corners. Unfortunately, there are many IBIS models having
package and pin parasitic sections, with some type of deificiency. For
example, I was recently examining an IBIS model Packaged in plastic QFP.
The parasitic section consisted of:
R_package = 100.00 mOhm
L_package = 8.00 nH
C_package = 7.0 pF
Above values were nominal. There were no values given for the Fast or
Slow corners, and there was no tolerance specified to allow computation
of the parasitics of the corners.
The relationship between pin and package parasitics is noteworthy. In
majority of models that I have evaluated they have possessed equal
values ( i.e. R_pin = R_package, C_pin = C_package, L_pin = L_package),
but there are many exceptions to this equality. It is possible for pin
parsitics to be larger or smaller than corresponding package parasitics.
However, many models contain values only for the package.
For SI simulation purposes, the pin parasitics are usually more
essential than package parasitics. For instance, the simulation program
that we use (QUAD) utilizes the package parameters only as a default for
pin parasitics. That is R_package, L_package and C_package are used
only if no values are present in the IBIS model for R_pin, L_pin and
C_pin. In many cases, R_pin has negligible effects and can be omitted.
The simple LC (lumped) parasitic representation may not yield
sufficient accuracy in some cases, and cause excessive noise and ringing
on the output. The transmission line modeling is then required. This
allows inclusion of R's and C's representing I/O pads, bond wire,
package trace, and pin lead. The PIN TOPSPEC feature of QUAD provides
one possible means for accomplishing complex pin modeling, during the
course of a simulation.
I am aware of the following two techniques for determination of a
1. By means of 2D (or 3D) simulation using a field solver program
(such as Pacific Numerics, QUAD's XFX, Ansoft 2D/3D, etc.).
2. Actual physical measurements (which requires test equipment such
as Network analyzer, LCR meter, etc.).
The former method appears to be the preferred choice of IBIS model
developers, according to information furnished by several IC vendors.
However, it is highly desirable to combine both procedures (when
feasible) to generate the most accurate data.
In conclusion, the pin and package parasitics can influence the
reliablity of a signal integrity simulation. Therefore, both the
suppliers and users of IBIS behavioral models should examine these
parameters for completeness and accuracy.
Your response and comments are appreciated.
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