[SI-LIST] : Pass-through vias as BGA lands (?)

Arrigo Benedetti (arrigo@vision.caltech.edu)
Mon, 1 Mar 1999 14:51:55 -0800

Dear all,

we have subcontracted the design of the PCB layout of a complex module
with a Xilinx FPGA in a BGA352 package to a consultant. To give you an
idea of the complexity of this module I will tell you that the FPGA is
interfaced to a static synchronous SRAM device clocked at least at 100
MHz. A RAMDAC is also present on board. The FPGA has a 2.5/3.3V dual
supply, the RAMDAC is a 3.3V part. In order to keep fabrication costs
low the consultant advocates to use pass-through vias as BGA
lands. He thinks that this will make his life much easier since every
FPGA pin will be accessible from all layers, and the board more easily
testable. I don't like this idea since:

1) The AC return currents in the power planes will be forced to follow
horrible paths between the vias.

2) During soldering of the BGA package the solder of the balls, once
melt, could be sucked into the holes, giving bad contacts. Would
filling the vias with extra solder help ?

I'm not an expert on PCB construction techniques so I would really
appreciate to have some feedback and advice on these issues,
especially 2).

Thanks in advance,

-Arrigo Benedetti

--
Dr. Arrigo Benedetti      o         e-mail: arrigo@vision.caltech.edu
Caltech, MS 136-93	 < >			phone: (626) 395-3695
Pasadena, CA 91125	 / \			fax:   (626) 795-8649

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