**From:** Lum Wee Mei (*lweemei@dso.org.sg*)

**Date:** Fri Oct 27 2000 - 00:15:52 PDT

**Next message:**ªL´Â·×: "[SI-LIST] : Electrical Analysis to prove the soundness of a design"**Previous message:**Lum Wee Mei: "Re: [SI-LIST] : Possible TDR microstrip measurement error?"**In reply to:**Lum Wee Mei: "Re: [SI-LIST] : Possible TDR microstrip measurement error?"**Next in thread:**Lusk, John B: "RE: [SI-LIST] : Possible TDR microstrip measurement error?"

Lum Wee Mei wrote:

*> JNH wrote:
*

*>
*

*>>
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*>>
*

*>> Eric,
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*>>
*

*>> For microstrip line measurement, I think we need to consider the
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*>> solder mask, covering the microstrip line with 0.7~1.0 mils
*

*>> thickness. So, the microstrip line is an embeded microstrip line not
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*>> pure microstrip. I use the polar tool -- CITS25 to do calculate the
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*>> microstrip and substrate 2~3 ohms to compensate the effect of solder
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*>> mask. The TDR measurment shows bigger deviation for microstrip line
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*>> than that of stripline. I believe it is caused by more processing
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*>> needed for the outer layers of a PCB, such as solder platting and
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*>> solder mask. A 0.5 oz (0.7mils) thickness copper will finally be
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*>> added up to 2.0 mils for the outer layers.
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*>>
*

*>>
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*>>
*

*>> Best Regards,
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*>>
*

*>> John Lin
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*>> SI Engineer, ARD4
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*>> Quanta Computer Inc.,Taiwan, R.O.C.
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*>> Email: John@quantatw.com
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*>> Tel: 886+3+3979000 ext. 5183
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*>>
*

*>> -----Original Message-----
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*>> From: Eric Bogatin [mailto:eric@bogent.com]
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*>> Sent: Friday, October 27, 2000 5:17 AM
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*>> To: Sun. COM
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*>> Cc: eric
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*>> Subject: [SI-LIST] : Possible TDR microstrip measurement error?
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*>>
*

*>> After a recent talk I gave on TDR measurements, I was approached by
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*>> a fellow
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*>> from the IPC (I apologize that I did not catch your name, whoever
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*>> you were),
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*>> with a problem that might be common in the board fab industry. I
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*>> wanted to
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*>> get comments from folks on the SI list as to whether you have
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*>> encountered
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*>> this problem or is it so obvious that everyone knows to watch out
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*>> for it.
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*>>
*

*>> In some shops, a TDR is used to measure the dielectric constant of
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*>> the board
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*>> material using test lines on coupons. Given the physical length, L,
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*>> and the
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*>> time delay, TD, for the one way trip (i.e., 1/2 the time measured by
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*>> the TDR
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*>> for an open terminated line), the speed of light in the material can
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*>> be
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*>> calculated as vel = L/TD. The dielectric constant is calculated as
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*>> sqrt(2.99
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*>> x 10^8 m/sec / vel). This is the straight forward part.
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*>>
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*>> When the trace is a stripline, the dielectric constant extracted is
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*>> the bulk
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*>> dielectric constant of the material surrounding the traces. This
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*>> value could
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*>> be put in a field solver to use to help predict the design rules for
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*>> traces
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*>> made with this material. I have had success in predicting board
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*>> trace
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*>> impedance to better than 2% with some field solvers, limited to how
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*>> well I
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*>> knew the cross section and dielectric constant.
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*>>
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*>> However, when the test line is a microstrip, some of the field lines
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*>> are in
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*>> air, and the dielectric constant calculated in this way is the
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*>> "effective"
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*>> dielectric constant, not the board's bulk dielectric constant. Yet,
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*>> I am
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*>> told some board shops use this measurement from microstrips to get a
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*>> value
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*>> for what they think is the bulk dielectric constant of their
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*>> material and
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*>> then use this value in a field solver or approximation. Of course,
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*>> their
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*>> predictions from the field solver- anyone's- would be off by as much
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*>> as
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*>> 10%-20%, for the measured impedance of the test lines. I suspect
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*>> this is the
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*>> basis for the comments I have heard that some fab shops are not
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*>> happy with
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*>> their field solvers- that they have had to add their own correction
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*>> factors
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*>> to the many approximations that are out there and each shop has
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*>> their own
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*>> oracle they consult to design a controlled impedance board.
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*>>
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*>> There is still value in the effective dielectric constant. >From the
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*>>
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*>> microstrip test line cross section, a 2D field solver can be used to
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*>> extract
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*>> what bulk dielectric constant the material under the trace must have
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*>> had to
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*>> result in the measured effective dielectric constant. If the board
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*>> shop used
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*>> this extracted value for the bulk dielectric constant, their
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*>> following field
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*>> solver results would probably be much more accurate.
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*>>
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*>> has anyone else encountered this problem in board shops?
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*>>
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*>> all comments are welcome.
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*>>
*

*>> --eric
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*>>
*

*>>
*

*>> Eric Bogatin
*

*>> BOGATIN ENTERPRISES
*

*>> Training for Signal Integrity and Interconnect Design
*

*>> v: 913-393-1305
*

*>> f: 913-393-1306
*

*>> e: eric@bogent.com
*

*>> web: <http://www.bogatinenterprises.com/>
*

*>> ftp: ftp://ftp.BogatinEnterprises.com
*

*>>
*

*>> **** To unsubscribe from si-list or si-list-digest: send e-mail to
*

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*

*>>
*

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*

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*

*>> ****
*

*>
*

*> While I agreed that soldermask has to be considered, whatever plating
*

*> added to the base copper should never be taken as part of the
*

*> thickness in impedance calculation. I may be wrong, then.
*

*>
*

*> Regards - Wee Mei
*

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**Next message:**ªL´Â·×: "[SI-LIST] : Electrical Analysis to prove the soundness of a design"**Previous message:**Lum Wee Mei: "Re: [SI-LIST] : Possible TDR microstrip measurement error?"**In reply to:**Lum Wee Mei: "Re: [SI-LIST] : Possible TDR microstrip measurement error?"**Next in thread:**Lusk, John B: "RE: [SI-LIST] : Possible TDR microstrip measurement error?"

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