From: George Borkowicz (firstname.lastname@example.org)
Date: Mon Aug 28 2000 - 10:08:43 PDT
Can you show your HSpice call to the driver and receiver?
> -----Original Message-----
> From: Ken Egan [SMTP:email@example.com]
> Sent: Saturday, August 26, 2000 3:32 PM
> To: silist
> Subject: [SI-LIST] : simple ?? newbie issue
> I'm relatively new to si, but not HSpice. I'm rather confused on how to
> accurately simulate
> a simple signal.
> I've got an IBIS model for the driver/reciever pair.
> network looks like this....
> |\ |\
> | \ 1" 4" 1" | \
> | /------- TL--------R--L-------TL_-------R--L--------TL---------| /
> |/ (R) | | | | |/
> C C C C
> | | | | <----- this mess is
> connector model
> GND GND GND GND
> No matter the series termination, this resultant signal looks like
> ( no the rs is not shown above ).
> Basically, I'm trying out the circuit shown in Intel's Low-Power Module
> Memory Bus Simulation Methodology.
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