RE: [SI-LIST] : simple ?? newbie issue

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From: George Borkowicz ([email protected])
Date: Tue Aug 29 2000 - 06:40:49 PDT


Ken,

When using IBIS models in HSPICE it is a good idea to be "over meticulous"
with ALL optional parameters. The reason is that the defaults are not
intuitive
to everybody. In your case I assume that the driver is an I/O (number 3)
buffer.
Say so specifically. You also do not specify ramp_fwf/rwf options. The
default
here is "do not use the VT curves". I don't know if this was the intention.
Yet another thing are the nd_pc/nd_gc parameters. If not specified (written
out
explicitly in the buffer call) then if the buffer is in input mode the
clamps will NOT
be applied to the pad.

Hope this helps.

George

> -----Original Message-----
> From: Ken Egan [SMTP:[email protected]]
> Sent: Monday, August 28, 2000 1:41 PM
> To: Borkowicz, George [KAN:0M21:EXCH]
> Subject: RE: [SI-LIST] : simple ?? newbie issue
>
> This is pretty much the whole spice deck.
> .TITLE DIMM TEST
> .OPTIONS PARHIER=LOCAL METHOD=GEAR RMIN=1F
> .param ZT=65
> .param RTERM=40
>
> vdd vdd vss DC vdd
> vss vss 0 DC vss
> vena3 mboff 0 DC vdd
> vena4 mbon 0 DC 0
> vena5 anviloff 0 DC anviloff
> vena6 anvilon 0 DC anvilon
> vmb mben 0 DC mben
> van anvilen 0 DC anvilen
>
>
> .param mboff=vdd anviloff=vdd
> .param mbon=vss anvilon=vss
>
> .param vdd=3.3 vss=0 gnd=0
> .param mben=mbon
> .param anvilen=anviloff
>
> Vd0 vin 0 PULSE(0 2.4 0 1NS 1NS 3NS 10NS)
>
>
> bmb vdd vss dq_mb vin mben mb_reciever
> + file='../ibis_models/bd8cls.ibs' model='bd8cls'
> +power=off
> +interpol=1 typ=typ
>
>
>
> tdim dq_mb vss dqdimm vss Z0=ZT TD=1n
>
> xdimm dqdimm dq_dimm vss dimmconnect
> tdim1 dq_dimm vss dqsdram vss Z0=ZT TD=.3n
>
>
>
> bin pc gc dqsdram anvilout
> + file='../ibis_models/ibufls.ibs' model='ibufls'
> +interpol=1 typ=typ
>
> .tran 10p 60n
> .END
>
>
> -----Original Message-----
> From: [email protected]
> [mailto:[email protected]]On Behalf Of George Borkowicz
> Sent: Monday, August 28, 2000 12:09 PM
> To: 'Ken Egan'; silist
> Subject: RE: [SI-LIST] : simple ?? newbie issue
>
>
>
> Can you show your HSpice call to the driver and receiver?
>
> George
>
> -----Original Message-----
> From: Ken Egan [SMTP:[email protected]]
> Sent: Saturday, August 26, 2000 3:32 PM
> To: silist
> Subject: [SI-LIST] : simple ?? newbie issue
>
> I'm relatively new to si, but not HSpice. I'm rather confused on how
> to
> accurately simulate
> a simple signal.
>
> I've got an IBIS model for the driver/reciever pair.
>
> network looks like this....
>
>
> |\
> |\
> | \ 1" 4" 1"
> | \
> | /-------
> TL--------R--L-------TL_-------R--L--------TL---------| /
> |/ (R) | | | |
> |/
> C C C C
> | | | | <----- this
> mess is a
> connector model
> GND GND GND GND
>
> No matter the series termination, this resultant signal looks
> like sh***.
> ( no the rs is not shown above ).
>
> Basically, I'm trying out the circuit shown in Intel's Low-Power
> Module
> Memory Bus Simulation Methodology.
>
> Thanks,
> Ken
>
>
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