RE: [SI-LIST] : Effects of thieving on SI and EMC.....

About this list Date view Thread view Subject view Author view

From: Dan Irish - Sun BOS Hardware (Dan.Irish@east.sun.com)
Date: Tue Aug 08 2000 - 15:09:21 PDT


Ray, all,

From what I understand, many PCB fab suppliers use
HASL (Hot-Air Solder Levelling) to plate the top and bottom
layers (from 1/2 oz copper to 1 oz, typically.)
HASL depends on uniform PCB thickness to work well.
To achieve uniform thickness, grids of small copper filled square
or circular "thieving pads" are added to layers that would
otherwise have large areas free of copper signals or plane shapes.
"Thieving pads" prevent too much copper from being thieved-away
during etching.

From an EMI standpoint, I believe the effect of thieving pads
depends on the grounding philosophy--whether chassis ground
is isolated from logic return as advocated by Henry Ott
or whether multi-point or hybrid grounding is used.

I have separated chassis ground from logic return with occasional
single-point grounds very successfully (again per Ott,) and thieving pads
have been a big EMI problem for me several times.
You could say this is a pet peeve of mine.

Here's a example--for a typical I/O board layout, chassis ground
is provided from the I/O sheet metal to the connector shields
to a chassis ground shape on the PCB that surrounds the I/O connectors.
All power and logic return (GND) planes and non-I/O signals
are cut back away from the I/O area, leaving a gap where only
EMI filter components are placed and I/O signals are routed.
I use 100 mils minimum spacing (rule-of-thumb by Stan Woo)
to prevent capacitive coupling of RF noise from the inside
to the quiet chassis ground.

Thieving pads are then added by the PCB supplier, which can
make very good stepping stones for capacitive coupling across
this gap. To prevent this, I specify a thieving pad keep-out
area in this gap on the fab drawing.

Regards,
Dan

> From: "Greim, Michael" <mgreim@mc.com>
> To: "'Ray Anderson'" <raymonda@radium.eng.sun.com>, "Greim, Michael"
<mgreim@mc.com>
> Cc: SI LIST <si-list@silab.eng.sun.com>
> Subject: RE: [SI-LIST] : Effects of thieving on SI and EMC.....
> Date: Tue, 8 Aug 2000 14:45:55 -0400
> MIME-Version: 1.0
>
> A thieving pattern is a bunch of very small shapes
> added to a layer that helps equalize the plating
> across a given layer (increases manufacturability).
> An auto thieving utility or program uses a set of
> criteria to determine how and where to put these
> shapes. Unfortunately these programs are almost
> exclusively focussed on mfg issues and not SI or
> EMC issues.
>
> Usually if you see a bunch of 1/16" width diamonds
> on an artwork layer, this is thieving.
>
> FYI
>
> MG
>
> -----Original Message-----
> From: Ray Anderson [mailto:raymonda@radium.eng.sun.com]
> Sent: Monday, July 31, 2000 11:12 AM
> To: Greim, Michael
> Cc: SI LIST
> Subject: Re: [SI-LIST] : Effects of thieving on SI and EMC.....
>
>
> OK, I'll bite. Educate me, what is a thieving pattern,
> and an auto-thiever ????
>
>
> -Ray
>
>
> > Does anyone out there have a tool or reference
> > that would allow one to calculate the effects of
> > thieving patterns on signal integrity and EMC.
> >
> > I am trying to come up with appropriate rule sets
> > for driving an auto-thiever utility.
> >
> > Thanks for the help.
> >
> > MG
> >
>
> **** To unsubscribe from si-list or si-list-digest: send e-mail to
> majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
> si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
> si-list archives are accessible at http://www.qsl.net/wb6tpu
> ****
>

**** To unsubscribe from si-list or si-list-digest: send e-mail to
majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Wed Nov 22 2000 - 10:50:59 PST