Re: [SI-LIST] : N-level signaling logic models

From: Jim Freeman ([email protected])
Date: Wed Dec 01 1999 - 13:04:14 PST

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• In reply to: Ray Anderson: "[SI-LIST] : N-level signaling logic models"

Hi Ray,
    The buffers I have dealt with were n-level current sources that generated a variable voltage across a fixed load. They were also differential and
required 100 ohms differential impedance.

Jim Freeman

Ray Anderson wrote:

> Anyone out there have any experience in modeling N-level
> signaling drivers in spice ? Or even any ideas on how you
> might implement such a beast as a behavioral model?
>
> I'm thinking of a driver that has controlled (both in amplitude
> and duration) 'overshoot' on both rising and falling edges.
>
> Excuse the fine ASCII art, the following diagram illustrates
> the basic concept I had in mind:
>
> ---- <-- controlled overshoot
> | |
> | |
> | ------ <-- Logic 1
> | |
> ------ | _______________ <--- Logic 0
> | |
> | |
> | |
> | |
> |___| <-- controlled overshoot
>
>
> Ray Anderson
>
> Sun Microsytems Inc.
>
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• Next message: Laurence Michaels: "[SI-LIST] : PCB impedance (was Re: si-list test)"
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