Mike King gave us this advice also.
In looking at the geometry of the edge of a board, if the resonant frequency is near
a harmonic of a frequency generated in a board it can support oscillations. Making
the ground layer longer effectively shields this resonant circuit from radiating into
the air.
However, there should be ground stitching around the periphery of the "hot" plane
from top to bottom ground planes to really cure the problem. There is nothing
magic about 20 X Height but for 5 mil dielectric this is only 100 mils clearance.
However for thicker dielectric where the reduction of ground area becomes excessive
3 X height should be sufficient. To determine what clearance is really required, one
can simulate(with a field solver) the impedance of a line over an infinite pland and over a limited ground plane and when the line over the limited ground plane comes within say
1 % of the impedance of the continuous ground plane the fringing field should be no greater than 1 percent of that with full parallel edges and should be negligible. 3 X should do the job.
Ron Miller
Mark Freeman wrote:
> Now and again I come across references to the "20-H Rule" for reducing radiation from power planes. This rule states that the power plane should be smaller than the ground plane; The power plane edges should be back from the power plane a distance of 20-times the plane spacing. This reduces fringing fields from the power plane and reduces coupling to adjacent planes and free space.
>
> Best I can tell, this rule originated with Mike King. The earliest reference I found is Mark Montrose's "Printed Circuit Board Design Techniques for EMC Compliance," pg. 26. I have not found any numbers - analytical, simulation or measurement - which indicate the effectiveness of this technique over frequency. Intuition (a dangerous thing for this digital designer to rely upon) tells me that the dimensions of the fringing fields are small, thus only affecting GHz-range signals. Is this technique currently only of interest to cell 'phone designers, or do we need to begin applying this technique to digital PBW design?
>
> Mark Freeman
> msf@stratos.com
> Stratos Product Development, LLC
>
> **** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****
--
Ronald B. Miller _\\|//_ Signal Integrity Engineer
(408)487-8017 (' 0-0 ') fax(408)487-8017
==========0000-(_)0000===========
Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA 95131
rmiller@brocade.com, rbmiller@sjm.infi.net
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Mike King gave us this advice also.
In looking at the geometry of the edge of a board, if the resonant frequency
is near
a harmonic of a frequency generated in a board it can support oscillations.
Making
the ground layer longer effectively shields this resonant circuit from
radiating into
the air.
However, there should be ground stitching around the periphery of the
"hot" plane
from top to bottom ground planes to really cure the problem.
There is nothing
magic about 20 X Height but for 5 mil dielectric this is only 100 mils
clearance.
However for thicker dielectric where the reduction of ground area becomes
excessive
3 X height should be sufficient. To determine what clearance
is really required, one
can simulate(with a field solver) the impedance of a line over an infinite
pland and over a limited ground plane and when the line over the limited
ground plane comes within say
1 % of the impedance of the continuous ground plane the fringing
field should be no greater than 1 percent of that with full parallel
edges and should be negligible. 3 X should do the job.
Ron Miller
Mark Freeman wrote:
Now and again I come across references to the "20-H
Rule" for reducing radiation from power planes. This rule states
that the power plane should be smaller than the ground plane; The power
plane edges should be back from the power plane a distance of 20-times
the plane spacing. This reduces fringing fields from the power plane
and reduces coupling to adjacent planes and free space.
Best I can tell, this rule originated with Mike King. The earliest
reference I found is Mark Montrose's "Printed Circuit Board Design Techniques
for EMC Compliance," pg. 26. I have not found any numbers - analytical,
simulation or measurement - which indicate the effectiveness of this technique
over frequency. Intuition (a dangerous thing for this digital designer
to rely upon) tells me that the dimensions of the fringing fields are small,
thus only affecting GHz-range signals. Is this technique currently
only of interest to cell 'phone designers, or do we need to begin applying
this technique to digital PBW design?
Mark Freeman
msf@stratos.com
Stratos Product Development, LLC
**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com.
In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list
****
--
Ronald B. Miller _\\|//_ Signal Integrity Engineer
(408)487-8017 (' 0-0 ') fax(408)487-8017
==========0000-(_)0000===========
Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA 95131
rmiller@brocade.com, rbmiller@sjm.infi.net
--------------FA3470C22EAF8F057F9BCC43--
**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****